derek.holloway
7502bf64a4
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88 lines
3.7 KiB
LLVM
88 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr,+avx --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX
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define i32 @map0(ptr nocapture noundef readonly %a, i64 noundef %b) {
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; CHECK-LABEL: map0:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movq %rsi, %r16 # encoding: [0xd5,0x18,0x89,0xf0]
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; CHECK-NEXT: movq %rdi, %r17 # encoding: [0xd5,0x18,0x89,0xf9]
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop # encoding: [0x90]
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movl (%r17,%r16,4), %eax # encoding: [0xd5,0x30,0x8b,0x04,0x81]
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; CHECK-NEXT: retq # encoding: [0xc3]
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entry:
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%add.ptr = getelementptr inbounds i32, ptr %a, i64 %b
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tail call void asm sideeffect "nop", "~{eax},~{ecx},~{edx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
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%0 = load i32, ptr %add.ptr
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ret i32 %0
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}
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define i32 @map1_or_vex(<2 x double> noundef %a) nounwind {
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; SSE-LABEL: map1_or_vex:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: cvtsd2si %xmm0, %r16d # encoding: [0xf2,0xd5,0xc0,0x2d,0xc0]
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; SSE-NEXT: #APP
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; SSE-NEXT: nop # encoding: [0x90]
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; SSE-NEXT: #NO_APP
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; SSE-NEXT: movl %r16d, %eax # encoding: [0xd5,0x40,0x89,0xc0]
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; SSE-NEXT: retq # encoding: [0xc3]
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;
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; AVX-LABEL: map1_or_vex:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: pushq %rbx # encoding: [0x53]
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; AVX-NEXT: vcvtsd2si %xmm0, %ebx # encoding: [0xc5,0xfb,0x2d,0xd8]
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; AVX-NEXT: #APP
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; AVX-NEXT: nop # encoding: [0x90]
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; AVX-NEXT: #NO_APP
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; AVX-NEXT: movl %ebx, %eax # encoding: [0x89,0xd8]
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; AVX-NEXT: popq %rbx # encoding: [0x5b]
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; AVX-NEXT: retq # encoding: [0xc3]
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entry:
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%0 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a)
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tail call void asm sideeffect "nop", "~{eax},~{ecx},~{edx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
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ret i32 %0
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}
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define <2 x i64> @map2_or_vex(ptr nocapture noundef readonly %b, i64 noundef %c) nounwind {
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; SSE-LABEL: map2_or_vex:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: pushq %r14 # encoding: [0x41,0x56]
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; SSE-NEXT: pushq %rbx # encoding: [0x53]
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; SSE-NEXT: movq %rsi, %rbx # encoding: [0x48,0x89,0xf3]
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; SSE-NEXT: movq %rdi, %r14 # encoding: [0x49,0x89,0xfe]
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; SSE-NEXT: #APP
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; SSE-NEXT: nop # encoding: [0x90]
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; SSE-NEXT: #NO_APP
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; SSE-NEXT: pabsb (%r14,%rbx,4), %xmm0 # encoding: [0x66,0x41,0x0f,0x38,0x1c,0x04,0x9e]
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; SSE-NEXT: popq %rbx # encoding: [0x5b]
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; SSE-NEXT: popq %r14 # encoding: [0x41,0x5e]
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; SSE-NEXT: retq # encoding: [0xc3]
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;
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; AVX-LABEL: map2_or_vex:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: pushq %r14 # encoding: [0x41,0x56]
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; AVX-NEXT: pushq %rbx # encoding: [0x53]
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; AVX-NEXT: movq %rsi, %rbx # encoding: [0x48,0x89,0xf3]
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; AVX-NEXT: movq %rdi, %r14 # encoding: [0x49,0x89,0xfe]
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; AVX-NEXT: #APP
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; AVX-NEXT: nop # encoding: [0x90]
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; AVX-NEXT: #NO_APP
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; AVX-NEXT: vpabsb (%r14,%rbx,4), %xmm0 # encoding: [0xc4,0xc2,0x79,0x1c,0x04,0x9e]
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; AVX-NEXT: popq %rbx # encoding: [0x5b]
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; AVX-NEXT: popq %r14 # encoding: [0x41,0x5e]
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; AVX-NEXT: retq # encoding: [0xc3]
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entry:
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tail call void asm sideeffect "nop", "~{eax},~{ecx},~{edx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
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%add.ptr = getelementptr inbounds i32, ptr %b, i64 %c
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%a = load <2 x i64>, ptr %add.ptr
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%0 = bitcast <2 x i64> %a to <16 x i8>
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%elt.abs.i = tail call <16 x i8> @llvm.abs.v16i8(<16 x i8> %0, i1 false)
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%1 = bitcast <16 x i8> %elt.abs.i to <2 x i64>
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ret <2 x i64> %1
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}
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declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>)
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declare <16 x i8> @llvm.abs.v16i8(<16 x i8>, i1 immarg)
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