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TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/apx/no-rex2-special.ll
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2026-09-02 16:34:47 -07:00

83 lines
3.6 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+xsave,+egpr --show-mc-encoding | FileCheck %s
define void @test_xsave(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xsave:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rbx # encoding: [0x53]
; CHECK-NEXT: movl %edx, %r16d # encoding: [0xd5,0x10,0x89,0xd0]
; CHECK-NEXT: movl %esi, %edx # encoding: [0x89,0xf2]
; CHECK-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
; CHECK-NEXT: #APP
; CHECK-NEXT: nop # encoding: [0x90]
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl %r16d, %eax # encoding: [0xd5,0x40,0x89,0xc0]
; CHECK-NEXT: xsave (%rbx) # encoding: [0x0f,0xae,0x23]
; CHECK-NEXT: popq %rbx # encoding: [0x5b]
; CHECK-NEXT: retq # encoding: [0xc3]
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
call void @llvm.x86.xsave(ptr %ptr, i32 %hi, i32 %lo)
ret void;
}
declare void @llvm.x86.xsave(ptr, i32, i32)
define void @test_xsave64(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xsave64:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rbx # encoding: [0x53]
; CHECK-NEXT: movl %edx, %r16d # encoding: [0xd5,0x10,0x89,0xd0]
; CHECK-NEXT: movl %esi, %edx # encoding: [0x89,0xf2]
; CHECK-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
; CHECK-NEXT: #APP
; CHECK-NEXT: nop # encoding: [0x90]
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl %r16d, %eax # encoding: [0xd5,0x40,0x89,0xc0]
; CHECK-NEXT: xsave64 (%rbx) # encoding: [0x48,0x0f,0xae,0x23]
; CHECK-NEXT: popq %rbx # encoding: [0x5b]
; CHECK-NEXT: retq # encoding: [0xc3]
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
call void @llvm.x86.xsave64(ptr %ptr, i32 %hi, i32 %lo)
ret void;
}
declare void @llvm.x86.xsave64(ptr, i32, i32)
define void @test_xrstor(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xrstor:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rbx # encoding: [0x53]
; CHECK-NEXT: movl %edx, %r16d # encoding: [0xd5,0x10,0x89,0xd0]
; CHECK-NEXT: movl %esi, %edx # encoding: [0x89,0xf2]
; CHECK-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
; CHECK-NEXT: #APP
; CHECK-NEXT: nop # encoding: [0x90]
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl %r16d, %eax # encoding: [0xd5,0x40,0x89,0xc0]
; CHECK-NEXT: xrstor (%rbx) # encoding: [0x0f,0xae,0x2b]
; CHECK-NEXT: popq %rbx # encoding: [0x5b]
; CHECK-NEXT: retq # encoding: [0xc3]
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
call void @llvm.x86.xrstor(ptr %ptr, i32 %hi, i32 %lo)
ret void;
}
declare void @llvm.x86.xrstor(ptr, i32, i32)
define void @test_xrstor64(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xrstor64:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rbx # encoding: [0x53]
; CHECK-NEXT: movl %edx, %r16d # encoding: [0xd5,0x10,0x89,0xd0]
; CHECK-NEXT: movl %esi, %edx # encoding: [0x89,0xf2]
; CHECK-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
; CHECK-NEXT: #APP
; CHECK-NEXT: nop # encoding: [0x90]
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl %r16d, %eax # encoding: [0xd5,0x40,0x89,0xc0]
; CHECK-NEXT: xrstor64 (%rbx) # encoding: [0x48,0x0f,0xae,0x2b]
; CHECK-NEXT: popq %rbx # encoding: [0x5b]
; CHECK-NEXT: retq # encoding: [0xc3]
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
call void @llvm.x86.xrstor64(ptr %ptr, i32 %hi, i32 %lo)
ret void;
}
declare void @llvm.x86.xrstor64(ptr, i32, i32)