derek.holloway
7502bf64a4
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66 lines
2.3 KiB
LLVM
66 lines
2.3 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=corei7 -mattr=-cx16 | FileCheck %s
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; RUN: llc < %s -mtriple=i386-linux-gnu -verify-machineinstrs -mattr=cx16 | FileCheck -check-prefix=CHECK32 %s
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;; Verify that 128-bit atomics emit a libcall without cx16
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;; available.
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;;
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;; We test 32-bit mode with -mattr=cx16, because it should have no
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;; effect for 32-bit mode.
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; CHECK-LABEL: test:
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define void @test(ptr %a) nounwind {
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entry:
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; CHECK: __atomic_compare_exchange_16
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; CHECK32: __atomic_compare_exchange
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%0 = cmpxchg ptr %a, i128 1, i128 1 seq_cst seq_cst
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; CHECK: __atomic_exchange_16
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; CHECK32: __atomic_exchange
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%1 = atomicrmw xchg ptr %a, i128 1 seq_cst
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; CHECK: __atomic_fetch_add_16
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; CHECK32: __atomic_compare_exchange
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%2 = atomicrmw add ptr %a, i128 1 seq_cst
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; CHECK: __atomic_fetch_sub_16
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; CHECK32: __atomic_compare_exchange
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%3 = atomicrmw sub ptr %a, i128 1 seq_cst
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; CHECK: __atomic_fetch_and_16
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; CHECK32: __atomic_compare_exchange
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%4 = atomicrmw and ptr %a, i128 1 seq_cst
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; CHECK: __atomic_fetch_nand_16
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; CHECK32: __atomic_compare_exchange
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%5 = atomicrmw nand ptr %a, i128 1 seq_cst
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; CHECK: __atomic_fetch_or_16
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; CHECK32: __atomic_compare_exchange
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%6 = atomicrmw or ptr %a, i128 1 seq_cst
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; CHECK: __atomic_fetch_xor_16
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; CHECK32: __atomic_compare_exchange
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%7 = atomicrmw xor ptr %a, i128 1 seq_cst
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; CHECK: __atomic_load_16
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; CHECK32: __atomic_load
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%8 = load atomic i128, ptr %a seq_cst, align 16
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; CHECK: __atomic_store_16
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; CHECK32: __atomic_store
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store atomic i128 %8, ptr %a seq_cst, align 16
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ret void
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}
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; CHECK-LABEL: test_fp:
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define void @test_fp(ptr %a) nounwind {
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entry:
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; CHECK: __atomic_exchange_16
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; CHECK32: __atomic_exchange
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%0 = atomicrmw xchg ptr %a, fp128 0xL00000000000000004000900000000000 seq_cst
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; CHECK: __atomic_compare_exchange_16
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; CHECK32: __atomic_compare_exchange
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%1 = atomicrmw fadd ptr %a, fp128 0xL00000000000000004000900000000000 seq_cst
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; CHECK: __atomic_compare_exchange_16
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; CHECK32: __atomic_compare_exchange
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%2 = atomicrmw fsub ptr %a, fp128 0xL00000000000000004000900000000000 seq_cst
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; CHECK: __atomic_load_16
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; CHECK32: __atomic_load
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%3 = load atomic fp128, ptr %a seq_cst, align 16
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; CHECK: __atomic_store_16
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; CHECK32: __atomic_store
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store atomic fp128 %3, ptr %a seq_cst, align 16
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ret void
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}
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