derek.holloway
7502bf64a4
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386 lines
13 KiB
LLVM
386 lines
13 KiB
LLVM
; Check that 64-bit division is bypassed correctly.
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; RUN: llc < %s -mtriple=x86_64-- -mattr=-idivq-to-divl | FileCheck %s --check-prefixes=CHECK,FAST-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+idivq-to-divl | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; Intel
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=nehalem | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=haswell | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=alderlake | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; AMD
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=barcelona | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
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; Additional tests for 64-bit divide bypass
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;
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; SDIV
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;
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define i64 @sdiv_quotient(i64 %a, i64 %b) nounwind {
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; FAST-DIVQ-LABEL: sdiv_quotient:
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; FAST-DIVQ: # %bb.0:
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; FAST-DIVQ-NEXT: movq %rdi, %rax
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; FAST-DIVQ-NEXT: cqto
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; FAST-DIVQ-NEXT: idivq %rsi
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; FAST-DIVQ-NEXT: retq
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;
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; SLOW-DIVQ-LABEL: sdiv_quotient:
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; SLOW-DIVQ: # %bb.0:
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; SLOW-DIVQ-DAG: movq %rdi, %rax
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; SLOW-DIVQ-DAG: movq %rdi, %rcx
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; SLOW-DIVQ-DAG: orq %rsi, %rcx
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; SLOW-DIVQ-DAG: shrq $32, %rcx
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; SLOW-DIVQ-NEXT: je .LBB0_1
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; SLOW-DIVQ-NEXT: # %bb.2:
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; SLOW-DIVQ-NEXT: cqto
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; SLOW-DIVQ-NEXT: idivq %rsi
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; SLOW-DIVQ-NEXT: retq
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; SLOW-DIVQ-NEXT: .LBB0_1:
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; SLOW-DIVQ-DAG: # kill: def $eax killed $eax killed $rax
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; SLOW-DIVQ-DAG: xorl %edx, %edx
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; SLOW-DIVQ-NEXT: divl %esi
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; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax def $rax
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; SLOW-DIVQ-NEXT: retq
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%result = sdiv i64 %a, %b
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ret i64 %result
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}
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define i64 @sdiv_quotient_optsize(i64 %a, i64 %b) nounwind optsize {
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; CHECK-LABEL: sdiv_quotient_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: retq
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%result = sdiv i64 %a, %b
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ret i64 %result
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}
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define i64 @sdiv_quotient_minsize(i64 %a, i64 %b) nounwind minsize {
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; CHECK-LABEL: sdiv_quotient_minsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: retq
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%result = sdiv i64 %a, %b
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ret i64 %result
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}
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define i64 @sdiv_remainder(i64 %a, i64 %b) nounwind {
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; FAST-DIVQ-LABEL: sdiv_remainder:
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; FAST-DIVQ: # %bb.0:
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; FAST-DIVQ-NEXT: movq %rdi, %rax
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; FAST-DIVQ-NEXT: cqto
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; FAST-DIVQ-NEXT: idivq %rsi
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; FAST-DIVQ-NEXT: movq %rdx, %rax
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; FAST-DIVQ-NEXT: retq
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;
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; SLOW-DIVQ-LABEL: sdiv_remainder:
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; SLOW-DIVQ: # %bb.0:
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; SLOW-DIVQ-DAG: movq %rdi, %rax
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; SLOW-DIVQ-DAG: movq %rdi, %rcx
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; SLOW-DIVQ-DAG: orq %rsi, %rcx
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; SLOW-DIVQ-DAG: shrq $32, %rcx
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; SLOW-DIVQ-NEXT: je .LBB3_1
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; SLOW-DIVQ-NEXT: # %bb.2:
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; SLOW-DIVQ-NEXT: cqto
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; SLOW-DIVQ-NEXT: idivq %rsi
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; SLOW-DIVQ-NEXT: movq %rdx, %rax
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; SLOW-DIVQ-NEXT: retq
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; SLOW-DIVQ-NEXT: .LBB3_1:
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; SLOW-DIVQ-DAG: # kill: def $eax killed $eax killed $rax
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; SLOW-DIVQ-DAG: xorl %edx, %edx
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; SLOW-DIVQ-NEXT: divl %esi
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; SLOW-DIVQ-NEXT: movl %edx, %eax
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; SLOW-DIVQ-NEXT: retq
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%result = srem i64 %a, %b
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ret i64 %result
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}
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define i64 @sdiv_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
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; CHECK-LABEL: sdiv_remainder_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: movq %rdx, %rax
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; CHECK-NEXT: retq
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%result = srem i64 %a, %b
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ret i64 %result
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}
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define i64 @sdiv_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
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; CHECK-LABEL: sdiv_remainder_minsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: movq %rdx, %rax
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; CHECK-NEXT: retq
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%result = srem i64 %a, %b
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ret i64 %result
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}
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define i64 @sdiv_quotient_and_remainder(i64 %a, i64 %b) nounwind {
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; FAST-DIVQ-LABEL: sdiv_quotient_and_remainder:
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; FAST-DIVQ: # %bb.0:
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; FAST-DIVQ-NEXT: movq %rdi, %rax
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; FAST-DIVQ-NEXT: cqto
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; FAST-DIVQ-NEXT: idivq %rsi
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; FAST-DIVQ-NEXT: addq %rdx, %rax
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; FAST-DIVQ-NEXT: retq
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;
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; SLOW-DIVQ-LABEL: sdiv_quotient_and_remainder:
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; SLOW-DIVQ: # %bb.0:
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; SLOW-DIVQ-DAG: movq %rdi, %rax
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; SLOW-DIVQ-DAG: movq %rdi, %rcx
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; SLOW-DIVQ-DAG: orq %rsi, %rcx
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; SLOW-DIVQ-DAG: shrq $32, %rcx
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; SLOW-DIVQ-NEXT: je .LBB6_1
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; SLOW-DIVQ-NEXT: # %bb.2:
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; SLOW-DIVQ-NEXT: cqto
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; SLOW-DIVQ-NEXT: idivq %rsi
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; SLOW-DIVQ-NEXT: addq %rdx, %rax
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; SLOW-DIVQ-NEXT: retq
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; SLOW-DIVQ-NEXT: .LBB6_1:
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; SLOW-DIVQ-DAG: # kill: def $eax killed $eax killed $rax
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; SLOW-DIVQ-DAG: xorl %edx, %edx
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; SLOW-DIVQ-NEXT: divl %esi
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; SLOW-DIVQ-NEXT: # kill: def $edx killed $edx def $rdx
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; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax def $rax
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; SLOW-DIVQ-NEXT: addq %rdx, %rax
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; SLOW-DIVQ-NEXT: retq
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%resultdiv = sdiv i64 %a, %b
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%resultrem = srem i64 %a, %b
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%result = add i64 %resultdiv, %resultrem
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ret i64 %result
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}
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define i64 @sdiv_quotient_and_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
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; CHECK-LABEL: sdiv_quotient_and_remainder_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: addq %rdx, %rax
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; CHECK-NEXT: retq
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%resultdiv = sdiv i64 %a, %b
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%resultrem = srem i64 %a, %b
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%result = add i64 %resultdiv, %resultrem
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ret i64 %result
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}
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define i64 @sdiv_quotient_and_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
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; CHECK-LABEL: sdiv_quotient_and_remainder_minsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: addq %rdx, %rax
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; CHECK-NEXT: retq
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%resultdiv = sdiv i64 %a, %b
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%resultrem = srem i64 %a, %b
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%result = add i64 %resultdiv, %resultrem
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ret i64 %result
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}
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;
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; UDIV
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;
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define i64 @udiv_quotient(i64 %a, i64 %b) nounwind {
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; FAST-DIVQ-LABEL: udiv_quotient:
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; FAST-DIVQ: # %bb.0:
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; FAST-DIVQ-NEXT: movq %rdi, %rax
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; FAST-DIVQ-NEXT: xorl %edx, %edx
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; FAST-DIVQ-NEXT: divq %rsi
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; FAST-DIVQ-NEXT: retq
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;
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; SLOW-DIVQ-LABEL: udiv_quotient:
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; SLOW-DIVQ: # %bb.0:
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; SLOW-DIVQ-DAG: movq %rdi, %rax
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; SLOW-DIVQ-DAG: movq %rdi, %rcx
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; SLOW-DIVQ-DAG: orq %rsi, %rcx
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; SLOW-DIVQ-DAG: shrq $32, %rcx
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; SLOW-DIVQ-NEXT: je .LBB9_1
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; SLOW-DIVQ-NEXT: # %bb.2:
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; SLOW-DIVQ-NEXT: xorl %edx, %edx
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; SLOW-DIVQ-NEXT: divq %rsi
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; SLOW-DIVQ-NEXT: retq
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; SLOW-DIVQ-NEXT: .LBB9_1:
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; SLOW-DIVQ-DAG: # kill: def $eax killed $eax killed $rax
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; SLOW-DIVQ-DAG: xorl %edx, %edx
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; SLOW-DIVQ-NEXT: divl %esi
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; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax def $rax
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; SLOW-DIVQ-NEXT: retq
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%result = udiv i64 %a, %b
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ret i64 %result
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}
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define i64 @udiv_quotient_optsize(i64 %a, i64 %b) nounwind optsize {
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; CHECK-LABEL: udiv_quotient_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: divq %rsi
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; CHECK-NEXT: retq
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%result = udiv i64 %a, %b
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ret i64 %result
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}
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define i64 @udiv_quotient_minsize(i64 %a, i64 %b) nounwind minsize {
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; CHECK-LABEL: udiv_quotient_minsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: divq %rsi
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; CHECK-NEXT: retq
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%result = udiv i64 %a, %b
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ret i64 %result
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}
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define i64 @udiv_remainder(i64 %a, i64 %b) nounwind {
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; FAST-DIVQ-LABEL: udiv_remainder:
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; FAST-DIVQ: # %bb.0:
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; FAST-DIVQ-NEXT: movq %rdi, %rax
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; FAST-DIVQ-NEXT: xorl %edx, %edx
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; FAST-DIVQ-NEXT: divq %rsi
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; FAST-DIVQ-NEXT: movq %rdx, %rax
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; FAST-DIVQ-NEXT: retq
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;
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; SLOW-DIVQ-LABEL: udiv_remainder:
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; SLOW-DIVQ: # %bb.0:
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; SLOW-DIVQ-DAG: movq %rdi, %rax
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; SLOW-DIVQ-DAG: movq %rdi, %rcx
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; SLOW-DIVQ-DAG: orq %rsi, %rcx
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; SLOW-DIVQ-DAG: shrq $32, %rcx
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; SLOW-DIVQ-NEXT: je .LBB12_1
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; SLOW-DIVQ-NEXT: # %bb.2:
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; SLOW-DIVQ-NEXT: xorl %edx, %edx
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; SLOW-DIVQ-NEXT: divq %rsi
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; SLOW-DIVQ-NEXT: movq %rdx, %rax
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; SLOW-DIVQ-NEXT: retq
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; SLOW-DIVQ-NEXT: .LBB12_1:
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; SLOW-DIVQ-DAG: # kill: def $eax killed $eax killed $rax
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; SLOW-DIVQ-DAG: xorl %edx, %edx
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; SLOW-DIVQ-NEXT: divl %esi
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; SLOW-DIVQ-NEXT: movl %edx, %eax
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; SLOW-DIVQ-NEXT: retq
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%result = urem i64 %a, %b
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ret i64 %result
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}
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define i64 @udiv_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
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; CHECK-LABEL: udiv_remainder_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: divq %rsi
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; CHECK-NEXT: movq %rdx, %rax
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; CHECK-NEXT: retq
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%result = urem i64 %a, %b
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ret i64 %result
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}
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define i64 @udiv_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
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; CHECK-LABEL: udiv_remainder_minsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: divq %rsi
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; CHECK-NEXT: movq %rdx, %rax
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; CHECK-NEXT: retq
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%result = urem i64 %a, %b
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ret i64 %result
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}
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define i64 @udiv_quotient_and_remainder(i64 %a, i64 %b) nounwind {
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; FAST-DIVQ-LABEL: udiv_quotient_and_remainder:
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; FAST-DIVQ: # %bb.0:
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; FAST-DIVQ-NEXT: movq %rdi, %rax
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; FAST-DIVQ-NEXT: xorl %edx, %edx
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; FAST-DIVQ-NEXT: divq %rsi
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; FAST-DIVQ-NEXT: addq %rdx, %rax
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; FAST-DIVQ-NEXT: retq
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;
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; SLOW-DIVQ-LABEL: udiv_quotient_and_remainder:
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; SLOW-DIVQ: # %bb.0:
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; SLOW-DIVQ-DAG: movq %rdi, %rax
|
|
; SLOW-DIVQ-DAG: movq %rdi, %rcx
|
|
; SLOW-DIVQ-DAG: orq %rsi, %rcx
|
|
; SLOW-DIVQ-DAG: shrq $32, %rcx
|
|
; SLOW-DIVQ-NEXT: je .LBB15_1
|
|
; SLOW-DIVQ-NEXT: # %bb.2:
|
|
; SLOW-DIVQ-NEXT: xorl %edx, %edx
|
|
; SLOW-DIVQ-NEXT: divq %rsi
|
|
; SLOW-DIVQ-NEXT: addq %rdx, %rax
|
|
; SLOW-DIVQ-NEXT: retq
|
|
; SLOW-DIVQ-NEXT: .LBB15_1:
|
|
; SLOW-DIVQ-DAG: # kill: def $eax killed $eax killed $rax
|
|
; SLOW-DIVQ-DAG: xorl %edx, %edx
|
|
; SLOW-DIVQ-NEXT: divl %esi
|
|
; SLOW-DIVQ-NEXT: # kill: def $edx killed $edx def $rdx
|
|
; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax def $rax
|
|
; SLOW-DIVQ-NEXT: addq %rdx, %rax
|
|
; SLOW-DIVQ-NEXT: retq
|
|
%resultdiv = udiv i64 %a, %b
|
|
%resultrem = urem i64 %a, %b
|
|
%result = add i64 %resultdiv, %resultrem
|
|
ret i64 %result
|
|
}
|
|
|
|
define i64 @udiv_quotient_and_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
|
|
; CHECK-LABEL: udiv_quotient_and_remainder_optsize:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movq %rdi, %rax
|
|
; CHECK-NEXT: xorl %edx, %edx
|
|
; CHECK-NEXT: divq %rsi
|
|
; CHECK-NEXT: addq %rdx, %rax
|
|
; CHECK-NEXT: retq
|
|
%resultdiv = udiv i64 %a, %b
|
|
%resultrem = urem i64 %a, %b
|
|
%result = add i64 %resultdiv, %resultrem
|
|
ret i64 %result
|
|
}
|
|
|
|
define i64 @udiv_quotient_and_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
|
|
; CHECK-LABEL: udiv_quotient_and_remainder_minsize:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movq %rdi, %rax
|
|
; CHECK-NEXT: xorl %edx, %edx
|
|
; CHECK-NEXT: divq %rsi
|
|
; CHECK-NEXT: addq %rdx, %rax
|
|
; CHECK-NEXT: retq
|
|
%resultdiv = udiv i64 %a, %b
|
|
%resultrem = urem i64 %a, %b
|
|
%result = add i64 %resultdiv, %resultrem
|
|
ret i64 %result
|
|
}
|
|
|
|
define void @PR43514(i32 %x, i32 %y) {
|
|
; CHECK-LABEL: PR43514:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: retq
|
|
%z1 = zext i32 %x to i64
|
|
%z2 = zext i32 %y to i64
|
|
%s = srem i64 %z1, %z2
|
|
ret void
|
|
}
|