derek.holloway
7502bf64a4
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46 lines
1.6 KiB
LLVM
46 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
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; Not from issue 76416, but separate testcase reported on the same
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; regressing commit.
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define void @other_regression(i1 %cmp.not.i.i.i) {
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; CHECK-LABEL: other_regression:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movl 0, %eax
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: sarl %cl, %eax
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; CHECK-NEXT: movl $1, %edx
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: shrl %cl, %edx
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; CHECK-NEXT: imull %eax, %edx
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; CHECK-NEXT: movslq %edx, %rsi
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: callq *%rax
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entry:
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br label %for.cond10.preheader
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trap: ; preds = %for.body13
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unreachable
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for.cond10.preheader: ; preds = %while.cond.i.i.i, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ 1, %while.cond.i.i.i ]
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%i = trunc i64 %indvars.iv to i32
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br label %for.body13
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for.body13: ; preds = %for.cond10.preheader
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%i1 = load i32, ptr null, align 4
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%shr = ashr i32 %i1, %i
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%shr15 = ashr i32 1, %i
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%mul16 = mul i32 %shr15, %shr
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%conv = sext i32 %mul16 to i64
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call void null(ptr null, i64 %conv, ptr null)
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br i1 false, label %while.cond.i.i.i, label %trap
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while.cond.i.i.i: ; preds = %while.cond.i.i.i, %for.body13
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br i1 %cmp.not.i.i.i, label %for.cond10.preheader, label %while.cond.i.i.i
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}
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