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TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/coalescer-copy-from-erasable-implicit-def.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

86 lines
3.2 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=x86_64-unknown-linux -verify-machineinstrs -o - %s | FileCheck %s
; Regression test for https://github.com/llvm/llvm-project/issues/195587.
; Register coalescer crashed coalescing a COPY from an erasable IMPLICIT_DEF
; when a tied-def redef immediately followed. Reduced from C reproducer via
; llvm-reduce.
define <16 x i32> @f1() {
; CHECK-LABEL: f1:
; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jne .LBB0_1
; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: movl $0, 0
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_3: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: # implicit-def: $xmm1
; CHECK-NEXT: # implicit-def: $xmm1
; CHECK-NEXT: # implicit-def: $xmm1
; CHECK-NEXT: xorps %xmm1, %xmm1
; CHECK-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jne .LBB0_3
; CHECK-NEXT: # %bb.4:
; CHECK-NEXT: je .LBB0_5
; CHECK-NEXT: # %bb.6:
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: xorps %xmm1, %xmm1
; CHECK-NEXT: xorps %xmm2, %xmm2
; CHECK-NEXT: xorps %xmm3, %xmm3
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB0_1:
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: .LBB0_5:
; CHECK-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1]
; CHECK-NEXT: movaps %xmm0, %xmm2
; CHECK-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[3,0]
; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0,2]
; CHECK-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,1,0]
; CHECK-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,2,3]
; CHECK-NEXT: # implicit-def: $xmm2
; CHECK-NEXT: # implicit-def: $xmm3
; CHECK-NEXT: retq
switch i8 0, label %2 [
i8 2, label %2
i8 8, label %7
i8 0, label %1
]
1:
store i32 0, ptr null, align 4
br label %4
2:
store i32 0, ptr null, align 4
br label %4
3:
ret <16 x i32> zeroinitializer
4:
%5 = phi <16 x i32> [ <i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, %1 ],
[ <i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, %2 ],
[ %6, %4 ]
%6 = insertelement <16 x i32> %5, i32 0, i64 0
switch i8 0, label %3 [
i8 2, label %3
i8 8, label %7
i8 0, label %4
]
7:
%8 = phi <16 x i32> [ <i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, %0 ],
[ %6, %4 ]
%9 = shufflevector <16 x i32> %8, <16 x i32> splat (i32 1),
<16 x i32> <i32 0, i32 1, i32 2, i32 19, i32 4, i32 21, i32 6, i32 7,
i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
ret <16 x i32> %9
}