derek.holloway
7502bf64a4
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254 lines
7.2 KiB
LLVM
254 lines
7.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
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define i32 @PR40483_add1(ptr, i32) nounwind {
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; X86-LABEL: PR40483_add1:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl (%ecx), %eax
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; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, (%ecx)
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; X86-NEXT: jae .LBB0_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: .LBB0_2:
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; X86-NEXT: retl
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;
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; X64-LABEL: PR40483_add1:
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; X64: # %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: addl (%rdi), %esi
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; X64-NEXT: movl %esi, (%rdi)
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; X64-NEXT: cmovael %esi, %eax
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; X64-NEXT: retq
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%3 = load i32, ptr %0, align 8
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%4 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %3, i32 %1)
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%5 = extractvalue { i8, i32 } %4, 1
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store i32 %5, ptr %0, align 8
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%6 = extractvalue { i8, i32 } %4, 0
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%7 = icmp eq i8 %6, 0
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%8 = add i32 %1, %3
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%9 = or i32 %5, %8
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%10 = select i1 %7, i32 %9, i32 0
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ret i32 %10
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}
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define i32 @PR40483_add2(ptr, i32) nounwind {
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; X86-LABEL: PR40483_add2:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl (%edx), %ecx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ecx, (%edx)
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; X86-NEXT: jae .LBB1_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB1_2:
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; X86-NEXT: retl
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;
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; X64-LABEL: PR40483_add2:
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; X64: # %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: addl (%rdi), %esi
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; X64-NEXT: movl %esi, (%rdi)
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; X64-NEXT: cmovbl %esi, %eax
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; X64-NEXT: retq
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%3 = load i32, ptr %0, align 8
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%4 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %3, i32 %1)
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%5 = extractvalue { i8, i32 } %4, 1
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store i32 %5, ptr %0, align 8
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%6 = extractvalue { i8, i32 } %4, 0
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%7 = icmp eq i8 %6, 0
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%8 = add i32 %3, %1
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%9 = or i32 %5, %8
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%10 = select i1 %7, i32 0, i32 %9
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ret i32 %10
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}
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define i32 @adc_merge_constants(i32 %a0) nounwind {
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; X86-LABEL: adc_merge_constants:
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; X86: # %bb.0:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: btl $11, {{[0-9]+}}(%esp)
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; X86-NEXT: adcl $54, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: adc_merge_constants:
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; X64: # %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: btl $11, %edi
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; X64-NEXT: adcl $54, %eax
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; X64-NEXT: retq
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%bit = lshr i32 %a0, 11
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%mask = and i32 %bit, 1
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%isz = trunc i32 %mask to i8
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%adc = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 %isz, i32 55, i32 -1)
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%sum = extractvalue { i8, i32 } %adc, 1
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ret i32 %sum
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}
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define i32 @adc_merge_sub(i32 %a0) nounwind {
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; X86-LABEL: adc_merge_sub:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: addl $42, %edi
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; X86-NEXT: setb %al
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; X86-NEXT: movl %edi, %esi
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; X86-NEXT: negl %esi
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; X86-NEXT: pushl %eax
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; X86-NEXT: calll use@PLT
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; X86-NEXT: addl $4, %esp
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; X86-NEXT: xorl %edi, %esi
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl
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;
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; X64-LABEL: adc_merge_sub:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rbp
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; X64-NEXT: pushq %rbx
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; X64-NEXT: pushq %rax
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; X64-NEXT: movl %edi, %ebx
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; X64-NEXT: xorl %edi, %edi
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; X64-NEXT: addl $42, %ebx
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; X64-NEXT: setb %dil
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; X64-NEXT: movl %ebx, %ebp
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; X64-NEXT: negl %ebp
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; X64-NEXT: callq use@PLT
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; X64-NEXT: xorl %ebx, %ebp
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; X64-NEXT: movl %ebp, %eax
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; X64-NEXT: addq $8, %rsp
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; X64-NEXT: popq %rbx
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; X64-NEXT: popq %rbp
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; X64-NEXT: retq
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%adc = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %a0, i32 42)
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%carry = extractvalue { i8, i32 } %adc, 0
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call void @use(i8 %carry)
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%sum = extractvalue { i8, i32 } %adc, 1
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%sub = sub i32 -42, %a0
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%result = xor i32 %sum, %sub
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ret i32 %result
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}
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; Basic positive test
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define i32 @adc_add(i32 %0, i32 %1, i32 %2, i32 %3) nounwind {
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; X86-LABEL: adc_add:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: cmpl %ecx, %eax
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; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: js .LBB4_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB4_2:
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; X86-NEXT: retl
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;
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; X64-LABEL: adc_add:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: cmpl %esi, %edi
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; X64-NEXT: adcl %ecx, %edx
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; X64-NEXT: cmovsl %edi, %eax
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; X64-NEXT: retq
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%5 = icmp ult i32 %0, %1
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%6 = add i32 %3, %2
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%7 = zext i1 %5 to i32
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%8 = add i32 %6, %7
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%9 = icmp slt i32 %8, 0
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%10 = select i1 %9, i32 %0, i32 %1
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ret i32 %10
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}
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; Negative test: Carry or overflow flag is used
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define i32 @adc_add_wrong_flags(i32 %0, i32 %1, i32 %2, i32 %3) nounwind {
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; X86-LABEL: adc_add_wrong_flags:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: addl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: cmpl %ecx, %eax
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; X86-NEXT: adcl $0, %edx
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; X86-NEXT: jb .LBB5_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB5_2:
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; X86-NEXT: retl
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;
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; X64-LABEL: adc_add_wrong_flags:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: addl %ecx, %edx
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; X64-NEXT: cmpl %esi, %edi
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; X64-NEXT: adcl $0, %edx
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; X64-NEXT: cmovbl %edi, %eax
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; X64-NEXT: retq
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%5 = icmp ult i32 %0, %1
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%6 = add i32 %3, %2
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%7 = zext i1 %5 to i32
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%8 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %6, i32 %7)
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%9 = extractvalue { i32, i1 } %8, 1
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%10 = select i1 %9, i32 %0, i32 %1
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ret i32 %10
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}
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; Negative test: Multi-use
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define i32 @adc_add_multi_use(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, ptr %5) nounwind {
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; X86-LABEL: adc_add_multi_use:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: leal (%edi,%esi), %ebx
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; X86-NEXT: cmpl %ecx, %eax
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; X86-NEXT: movl %ebx, (%edx)
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; X86-NEXT: adcl %esi, %edi
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; X86-NEXT: addl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: js .LBB6_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB6_2:
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: retl
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;
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; X64-LABEL: adc_add_multi_use:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $ecx killed $ecx def $rcx
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; X64-NEXT: # kill: def $edx killed $edx def $rdx
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: leal (%rcx,%rdx), %esi
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; X64-NEXT: cmpl %eax, %edi
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; X64-NEXT: movl %esi, (%r9)
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; X64-NEXT: adcl %edx, %ecx
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; X64-NEXT: addl %r8d, %ecx
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; X64-NEXT: cmovsl %edi, %eax
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; X64-NEXT: retq
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%7 = icmp ult i32 %0, %1
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%8 = add i32 %3, %2
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store i32 %8, ptr %5, align 4
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%9 = zext i1 %7 to i32
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%10 = add i32 %8, %9
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%11 = add i32 %10, %4
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%12 = icmp slt i32 %11, 0
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%13 = select i1 %12, i32 %0, i32 %1
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ret i32 %13
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}
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declare { i8, i32 } @llvm.x86.addcarry.32(i8, i32, i32)
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declare void @use(i8)
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