derek.holloway
7502bf64a4
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102 lines
3.8 KiB
LLVM
102 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+gfni | FileCheck %s --check-prefixes=SSE
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+gfni,+avx | FileCheck %s --check-prefixes=AVX
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+gfni,+avx512bw | FileCheck %s --check-prefixes=AVX512
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define <16 x i8> @gf2p8affineqb_freeze(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
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; SSE-LABEL: gf2p8affineqb_freeze:
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; SSE: # %bb.0:
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; SSE-NEXT: pxor %xmm3, %xmm3
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; SSE-NEXT: pcmpgtb %xmm2, %xmm3
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; SSE-NEXT: gf2p8affineqb $11, %xmm1, %xmm1
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; SSE-NEXT: pand %xmm3, %xmm1
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; SSE-NEXT: pandn %xmm0, %xmm3
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; SSE-NEXT: por %xmm1, %xmm3
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; SSE-NEXT: movdqa %xmm3, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: gf2p8affineqb_freeze:
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; AVX: # %bb.0:
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; AVX-NEXT: vgf2p8affineqb $11, %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: gf2p8affineqb_freeze:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpmovb2m %xmm2, %k1
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; AVX512-NEXT: vgf2p8affineqb $11, %xmm1, %xmm1, %xmm0 {%k1}
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; AVX512-NEXT: retq
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%i = icmp slt <16 x i8> %a2, zeroinitializer
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%g = call <16 x i8> @llvm.x86.vgf2p8affineqb.128(<16 x i8> %a1, <16 x i8> %a1, i8 11)
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%f = freeze <16 x i8> %g
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%r = select <16 x i1> %i, <16 x i8> %f, <16 x i8> %a0
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ret <16 x i8> %r
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}
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define <16 x i8> @gf2p8affineinvqb_freeze(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
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; SSE-LABEL: gf2p8affineinvqb_freeze:
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; SSE: # %bb.0:
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; SSE-NEXT: pxor %xmm3, %xmm3
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; SSE-NEXT: pcmpgtb %xmm2, %xmm3
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; SSE-NEXT: gf2p8affineinvqb $11, %xmm1, %xmm1
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; SSE-NEXT: pand %xmm3, %xmm1
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; SSE-NEXT: pandn %xmm0, %xmm3
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; SSE-NEXT: por %xmm1, %xmm3
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; SSE-NEXT: movdqa %xmm3, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: gf2p8affineinvqb_freeze:
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; AVX: # %bb.0:
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; AVX-NEXT: vgf2p8affineinvqb $11, %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: gf2p8affineinvqb_freeze:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpmovb2m %xmm2, %k1
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; AVX512-NEXT: vgf2p8affineinvqb $11, %xmm1, %xmm1, %xmm0 {%k1}
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; AVX512-NEXT: retq
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%i = icmp slt <16 x i8> %a2, zeroinitializer
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%g = call <16 x i8> @llvm.x86.vgf2p8affineinvqb.128(<16 x i8> %a1, <16 x i8> %a1, i8 11)
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%f = freeze <16 x i8> %g
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%r = select <16 x i1> %i, <16 x i8> %f, <16 x i8> %a0
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ret <16 x i8> %r
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}
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define <16 x i8> @gf2p8mulb_freeze(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
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; SSE-LABEL: gf2p8mulb_freeze:
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; SSE: # %bb.0:
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; SSE-NEXT: pxor %xmm3, %xmm3
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; SSE-NEXT: pcmpgtb %xmm2, %xmm3
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; SSE-NEXT: gf2p8mulb %xmm1, %xmm1
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; SSE-NEXT: pand %xmm3, %xmm1
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; SSE-NEXT: pandn %xmm0, %xmm3
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; SSE-NEXT: por %xmm1, %xmm3
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; SSE-NEXT: movdqa %xmm3, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: gf2p8mulb_freeze:
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; AVX: # %bb.0:
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; AVX-NEXT: vgf2p8mulb %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: gf2p8mulb_freeze:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpmovb2m %xmm2, %k1
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; AVX512-NEXT: vgf2p8mulb %xmm1, %xmm1, %xmm0 {%k1}
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; AVX512-NEXT: retq
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%i = icmp slt <16 x i8> %a2, zeroinitializer
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%g = call <16 x i8> @llvm.x86.vgf2p8mulb.128(<16 x i8> %a1, <16 x i8> %a1)
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%f = freeze <16 x i8> %g
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%r = select <16 x i1> %i, <16 x i8> %f, <16 x i8> %a0
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ret <16 x i8> %r
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}
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declare <16 x i8> @llvm.x86.vgf2p8affineqb.128(<16 x i8>, <16 x i8>, i8)
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declare <32 x i8> @llvm.x86.vgf2p8affineqb.256(<32 x i8>, <32 x i8>, i8)
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declare <16 x i8> @llvm.x86.vgf2p8affineinvqb.128(<16 x i8>, <16 x i8>, i8)
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declare <32 x i8> @llvm.x86.vgf2p8affineinvqb.256(<32 x i8>, <32 x i8>, i8)
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declare <16 x i8> @llvm.x86.vgf2p8mulb.128(<16 x i8>, <16 x i8>)
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declare <32 x i8> @llvm.x86.vgf2p8mulb.256(<32 x i8>, <32 x i8>)
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