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454 lines
12 KiB
LLVM
454 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
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; fold (shl (zext (lshr (A, X))), X) -> (zext (shl (lshr (A, X)), X))
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; Canolicalize the sequence shl/zext/lshr performing the zeroextend
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; as the last instruction of the sequence.
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; This will help DAGCombiner to identify and then fold the sequence
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; of shifts into a single AND.
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; This transformation is profitable if the shift amounts are the same
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; and if there is only one use of the zext.
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define i16 @fun1(i8 zeroext %v) {
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; X86-LABEL: fun1:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: # kill: def $ax killed $ax killed $eax
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; X86-NEXT: retl
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;
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; X64-LABEL: fun1:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-16, %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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entry:
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%shr = lshr i8 %v, 4
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%ext = zext i8 %shr to i16
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%shl = shl i16 %ext, 4
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ret i16 %shl
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}
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define i32 @fun2(i8 zeroext %v) {
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; X86-LABEL: fun2:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: fun2:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-16, %eax
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; X64-NEXT: retq
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entry:
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%shr = lshr i8 %v, 4
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%ext = zext i8 %shr to i32
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%shl = shl i32 %ext, 4
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ret i32 %shl
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}
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define i32 @fun3(i16 zeroext %v) {
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; X86-LABEL: fun3:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: fun3:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-16, %eax
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; X64-NEXT: retq
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entry:
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%shr = lshr i16 %v, 4
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%ext = zext i16 %shr to i32
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%shl = shl i32 %ext, 4
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ret i32 %shl
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}
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define i64 @fun4(i8 zeroext %v) {
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; X86-LABEL: fun4:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: fun4:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-16, %eax
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; X64-NEXT: retq
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entry:
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%shr = lshr i8 %v, 4
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%ext = zext i8 %shr to i64
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%shl = shl i64 %ext, 4
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ret i64 %shl
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}
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define i64 @fun5(i16 zeroext %v) {
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; X86-LABEL: fun5:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: fun5:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-16, %eax
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; X64-NEXT: retq
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entry:
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%shr = lshr i16 %v, 4
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%ext = zext i16 %shr to i64
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%shl = shl i64 %ext, 4
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ret i64 %shl
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}
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define i64 @fun6(i32 zeroext %v) {
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; X86-LABEL: fun6:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: fun6:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-16, %eax
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; X64-NEXT: retq
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entry:
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%shr = lshr i32 %v, 4
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%ext = zext i32 %shr to i64
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%shl = shl i64 %ext, 4
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ret i64 %shl
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}
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; Don't fold the pattern if we use arithmetic shifts.
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define i64 @fun7(i8 zeroext %v) {
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; X86-LABEL: fun7:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: sarb $4, %al
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; X86-NEXT: movzbl %al, %eax
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; X86-NEXT: shll $4, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: fun7:
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; X64: # %bb.0: # %entry
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; X64-NEXT: sarb $4, %dil
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: shll $4, %eax
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; X64-NEXT: retq
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entry:
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%shr = ashr i8 %v, 4
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%ext = zext i8 %shr to i64
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%shl = shl i64 %ext, 4
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ret i64 %shl
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}
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define i64 @fun8(i16 zeroext %v) {
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; X86-LABEL: fun8:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $1048560, %eax # imm = 0xFFFF0
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: fun8:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movswl %di, %eax
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; X64-NEXT: andl $1048560, %eax # imm = 0xFFFF0
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; X64-NEXT: retq
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entry:
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%shr = ashr i16 %v, 4
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%ext = zext i16 %shr to i64
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%shl = shl i64 %ext, 4
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ret i64 %shl
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}
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define i64 @fun9(i32 zeroext %v) {
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; X86-LABEL: fun9:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, %edx
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; X86-NEXT: sarl $4, %edx
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: shrl $28, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: fun9:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: sarl $4, %eax
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; X64-NEXT: shlq $4, %rax
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; X64-NEXT: retq
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entry:
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%shr = ashr i32 %v, 4
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%ext = zext i32 %shr to i64
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%shl = shl i64 %ext, 4
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ret i64 %shl
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}
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; Don't fold the pattern if there is more than one use of the
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; operand in input to the shift left.
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define i64 @fun10(i8 zeroext %v) {
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; X86-LABEL: fun10:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrb $4, %al
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; X86-NEXT: movzbl %al, %ecx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: shll $4, %eax
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; X86-NEXT: orl %ecx, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: fun10:
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; X64: # %bb.0: # %entry
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shrb $4, %al
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: andl $-16, %edi
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; X64-NEXT: orq %rdi, %rax
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; X64-NEXT: retq
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entry:
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%shr = lshr i8 %v, 4
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%ext = zext i8 %shr to i64
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%shl = shl i64 %ext, 4
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%add = add i64 %shl, %ext
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ret i64 %add
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}
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define i64 @fun11(i16 zeroext %v) {
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; X86-LABEL: fun11:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: shrl $4, %ecx
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: addl %ecx, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: fun11:
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; X64: # %bb.0: # %entry
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shrl $4, %eax
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; X64-NEXT: andl $-16, %edi
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; X64-NEXT: addq %rdi, %rax
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; X64-NEXT: retq
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entry:
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%shr = lshr i16 %v, 4
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%ext = zext i16 %shr to i64
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%shl = shl i64 %ext, 4
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%add = add i64 %shl, %ext
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ret i64 %add
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}
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define i64 @fun12(i32 zeroext %v) {
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; X86-LABEL: fun12:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: shrl $4, %ecx
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: addl %ecx, %eax
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; X86-NEXT: setb %dl
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; X86-NEXT: retl
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;
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; X64-LABEL: fun12:
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; X64: # %bb.0: # %entry
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shrl $4, %eax
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; X64-NEXT: andl $-16, %edi
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; X64-NEXT: addq %rdi, %rax
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; X64-NEXT: retq
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entry:
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%shr = lshr i32 %v, 4
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%ext = zext i32 %shr to i64
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%shl = shl i64 %ext, 4
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%add = add i64 %shl, %ext
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ret i64 %add
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}
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; PR17380
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; Make sure that the combined dags are legal if we run the DAGCombiner after
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; Legalization took place. The add instruction is redundant and increases by
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; one the number of uses of the zext. This prevents the transformation from
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; firing before dags are legalized and optimized.
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; Once the add is removed, the number of uses becomes one and therefore the
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; dags are canonicalized. After Legalization, we need to make sure that the
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; valuetype for the shift count is legal.
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; Verify also that we correctly fold the shl-shr sequence into an
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; AND with bitmask.
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define void @g(i32 %a) nounwind {
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; X86-LABEL: g:
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; X86: # %bb.0:
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; X86-NEXT: subl $12, %esp
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-4, %eax
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: pushl $0
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; X86-NEXT: pushl %eax
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; X86-NEXT: calll f
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; X86-NEXT: addl $28, %esp
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; X86-NEXT: retl
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;
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; X64-LABEL: g:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: andl $-4, %edi
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; X64-NEXT: jmp f # TAILCALL
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%b = lshr i32 %a, 2
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%c = zext i32 %b to i64
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%d = add i64 %c, 1
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%e = shl i64 %c, 2
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tail call void @f(i64 %e)
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ret void
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}
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define i32 @shift_zext_shl(i8 zeroext %x) {
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; X86-LABEL: shift_zext_shl:
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; X86: # %bb.0:
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $64, %eax
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; X86-NEXT: shll $9, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: shift_zext_shl:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $64, %eax
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; X64-NEXT: shll $9, %eax
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; X64-NEXT: retq
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%a = and i8 %x, 64
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%b = zext i8 %a to i16
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%c = shl i16 %b, 9
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%d = zext i16 %c to i32
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ret i32 %d
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}
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define i32 @shift_zext_shl2(i8 zeroext %x) {
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; X86-LABEL: shift_zext_shl2:
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; X86: # %bb.0:
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $64, %eax
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; X86-NEXT: shll $9, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: shift_zext_shl2:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $64, %eax
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; X64-NEXT: shll $9, %eax
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; X64-NEXT: retq
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%a = and i8 %x, 64
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%b = zext i8 %a to i32
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%c = shl i32 %b, 9
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ret i32 %c
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}
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define <4 x i32> @shift_zext_shl_vec(<4 x i8> %x) nounwind {
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; X86-LABEL: shift_zext_shl_vec:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: andl $64, %ecx
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; X86-NEXT: shll $9, %ecx
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; X86-NEXT: andl $63, %edx
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; X86-NEXT: shll $8, %edx
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; X86-NEXT: andl $31, %esi
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; X86-NEXT: shll $7, %esi
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; X86-NEXT: andl $23, %edi
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; X86-NEXT: shll $6, %edi
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; X86-NEXT: movl %edi, 12(%eax)
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; X86-NEXT: movl %esi, 8(%eax)
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; X86-NEXT: movl %edx, 4(%eax)
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; X86-NEXT: movl %ecx, (%eax)
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl $4
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;
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; X64-LABEL: shift_zext_shl_vec:
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; X64: # %bb.0:
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; X64-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; X64-NEXT: pxor %xmm1, %xmm1
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; X64-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X64-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [512,256,128,64,u,u,u,u]
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|
; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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|
; X64-NEXT: retq
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%a = and <4 x i8> %x, <i8 64, i8 63, i8 31, i8 23>
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%b = zext <4 x i8> %a to <4 x i16>
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%c = shl <4 x i16> %b, <i16 9, i16 8, i16 7, i16 6>
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|
%d = zext <4 x i16> %c to <4 x i32>
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ret <4 x i32> %d
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|
}
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define <4 x i32> @shift_zext_shl2_vec(<4 x i8> %x) nounwind {
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|
; X86-LABEL: shift_zext_shl2_vec:
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|
; X86: # %bb.0:
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|
; X86-NEXT: pushl %edi
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|
; X86-NEXT: pushl %esi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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|
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
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|
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %esi
|
|
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edi
|
|
; X86-NEXT: andl $23, %edi
|
|
; X86-NEXT: andl $31, %esi
|
|
; X86-NEXT: andl $63, %edx
|
|
; X86-NEXT: andl $64, %ecx
|
|
; X86-NEXT: shll $9, %ecx
|
|
; X86-NEXT: shll $8, %edx
|
|
; X86-NEXT: shll $7, %esi
|
|
; X86-NEXT: shll $6, %edi
|
|
; X86-NEXT: movl %edi, 12(%eax)
|
|
; X86-NEXT: movl %esi, 8(%eax)
|
|
; X86-NEXT: movl %edx, 4(%eax)
|
|
; X86-NEXT: movl %ecx, (%eax)
|
|
; X86-NEXT: popl %esi
|
|
; X86-NEXT: popl %edi
|
|
; X86-NEXT: retl $4
|
|
;
|
|
; X64-LABEL: shift_zext_shl2_vec:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; X64-NEXT: pxor %xmm1, %xmm1
|
|
; X64-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
|
|
; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
|
|
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
|
; X64-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [512,256,128,64]
|
|
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
|
; X64-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [256,256,64,64]
|
|
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
|
|
; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
|
; X64-NEXT: retq
|
|
%a = and <4 x i8> %x, <i8 64, i8 63, i8 31, i8 23>
|
|
%b = zext <4 x i8> %a to <4 x i32>
|
|
%c = shl <4 x i32> %b, <i32 9, i32 8, i32 7, i32 6>
|
|
ret <4 x i32> %c
|
|
}
|
|
|
|
declare dso_local void @f(i64)
|
|
|