derek.holloway
7502bf64a4
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50 lines
1.9 KiB
LLVM
50 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
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; rdar://12721174
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; We should not fold movss into pshufd since pshufd expects m128 while movss
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; loads from m32.
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define void @sample_test(ptr %source, ptr %dest) nounwind {
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; CHECK-LABEL: sample_test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subq $24, %rsp
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; CHECK-NEXT: movq %rdi, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %rsi, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq $0, (%rsp)
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
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; CHECK-NEXT: movlps %xmm0, (%rsp)
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; CHECK-NEXT: movlps %xmm0, (%rsi)
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; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; CHECK-NEXT: callq ext@PLT
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; CHECK-NEXT: addq $24, %rsp
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; CHECK-NEXT: retq
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entry:
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%source.addr = alloca ptr, align 8
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%dest.addr = alloca ptr, align 8
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%tmp = alloca <2 x float>, align 8
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store ptr %source, ptr %source.addr, align 8
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store ptr %dest, ptr %dest.addr, align 8
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store <2 x float> zeroinitializer, ptr %tmp, align 8
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%0 = load ptr, ptr %source.addr, align 8
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%1 = load <4 x float>, ptr %0, align 16
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%2 = extractelement <4 x float> %1, i32 0
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%3 = load <2 x float>, ptr %tmp, align 8
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%4 = insertelement <2 x float> %3, float %2, i32 1
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store <2 x float> %4, ptr %tmp, align 8
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%5 = load <2 x float>, ptr %tmp, align 8
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%6 = load ptr, ptr %dest.addr, align 8
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store <2 x float> %5, ptr %6, align 8
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%7 = load ptr, ptr %dest.addr, align 8
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%8 = load <2 x float>, ptr %7, align 8
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%vecext = extractelement <2 x float> %8, i32 0
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%9 = load ptr, ptr %dest.addr, align 8
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%10 = load <2 x float>, ptr %9, align 8
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%vecext4 = extractelement <2 x float> %10, i32 1
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call void @ext(float %vecext, float %vecext4)
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ret void
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}
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declare void @ext(float, float)
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