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TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/gfni-shifts.ll
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derek.holloway 7502bf64a4
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2463 lines
130 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
;
; 128 Bit Vector Shifts
;
define <16 x i8> @var_shl_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; GFNISSE-LABEL: var_shl_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm2 = [9241421688590303745,0]
; GFNISSE-NEXT: pshufb %xmm1, %xmm2
; GFNISSE-NEXT: movq {{.*#+}} xmm3 = [72909780498219007,0]
; GFNISSE-NEXT: pshufb %xmm1, %xmm3
; GFNISSE-NEXT: pand %xmm3, %xmm0
; GFNISSE-NEXT: gf2p8mulb %xmm2, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1OR2-LABEL: var_shl_v16i8:
; GFNIAVX1OR2: # %bb.0:
; GFNIAVX1OR2-NEXT: vmovq {{.*#+}} xmm2 = [9241421688590303745,0]
; GFNIAVX1OR2-NEXT: vpshufb %xmm1, %xmm2, %xmm2
; GFNIAVX1OR2-NEXT: vmovq {{.*#+}} xmm3 = [72909780498219007,0]
; GFNIAVX1OR2-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; GFNIAVX1OR2-NEXT: vpand %xmm1, %xmm0, %xmm0
; GFNIAVX1OR2-NEXT: vgf2p8mulb %xmm2, %xmm0, %xmm0
; GFNIAVX1OR2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_shl_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_shl_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
; GFNIAVX512BW-NEXT: vpsllvw %ymm1, %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%shift = shl <16 x i8> %a, %b
ret <16 x i8> %shift
}
define <16 x i8> @var_lshr_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; GFNISSE-LABEL: var_lshr_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm2 = [72909780498219007,0]
; GFNISSE-NEXT: pshufb %xmm1, %xmm2
; GFNISSE-NEXT: movdqa {{.*#+}} xmm3 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm3, %xmm0
; GFNISSE-NEXT: pand %xmm2, %xmm0
; GFNISSE-NEXT: movq {{.*#+}} xmm2 = [9241421688590303745,0]
; GFNISSE-NEXT: pshufb %xmm1, %xmm2
; GFNISSE-NEXT: gf2p8mulb %xmm2, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm3, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: var_lshr_v16i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm2 = [72909780498219007,0]
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm2
; GFNIAVX1-NEXT: vmovddup {{.*#+}} xmm3 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: # xmm3 = mem[0,0]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,0,0,0,0,0,0,0,0]
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1
; GFNIAVX1-NEXT: vgf2p8mulb %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: var_lshr_v16i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vmovq {{.*#+}} xmm2 = [72909780498219007,0]
; GFNIAVX2-NEXT: vpshufb %xmm1, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} xmm3 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %xmm3, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
; GFNIAVX2-NEXT: vmovq {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,0,0,0,0,0,0,0,0]
; GFNIAVX2-NEXT: vpshufb %xmm1, %xmm2, %xmm1
; GFNIAVX2-NEXT: vgf2p8mulb %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %xmm3, %xmm0, %xmm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_lshr_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_lshr_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
; GFNIAVX512BW-NEXT: vpsrlvw %ymm1, %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%shift = lshr <16 x i8> %a, %b
ret <16 x i8> %shift
}
define <16 x i8> @var_ashr_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; GFNISSE-LABEL: var_ashr_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm2 = [9241421688590303745,0]
; GFNISSE-NEXT: pshufb %xmm1, %xmm2
; GFNISSE-NEXT: movq {{.*#+}} xmm3 = [72909780498219007,0]
; GFNISSE-NEXT: pshufb %xmm1, %xmm3
; GFNISSE-NEXT: movdqa {{.*#+}} xmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: pand %xmm3, %xmm1
; GFNISSE-NEXT: gf2p8mulb %xmm2, %xmm1
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm0
; GFNISSE-NEXT: pand %xmm3, %xmm0
; GFNISSE-NEXT: gf2p8mulb %xmm2, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm0
; GFNISSE-NEXT: pxor %xmm1, %xmm0
; GFNISSE-NEXT: psubb %xmm1, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: var_ashr_v16i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,0,0,0,0,0,0,0,0]
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm2
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm3 = [72909780498219007,0]
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; GFNIAVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
; GFNIAVX1-NEXT: vgf2p8mulb %xmm2, %xmm3, %xmm3
; GFNIAVX1-NEXT: vmovddup {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: # xmm4 = mem[0,0]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm3, %xmm3
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8mulb %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpxor %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpsubb %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: var_ashr_v16i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vmovq {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,0,0,0,0,0,0,0,0]
; GFNIAVX2-NEXT: vpshufb %xmm1, %xmm2, %xmm2
; GFNIAVX2-NEXT: vmovq {{.*#+}} xmm3 = [72909780498219007,0]
; GFNIAVX2-NEXT: vpshufb %xmm1, %xmm3, %xmm1
; GFNIAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
; GFNIAVX2-NEXT: vgf2p8mulb %xmm2, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %xmm4, %xmm3, %xmm3
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %xmm4, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vgf2p8mulb %xmm2, %xmm0, %xmm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %xmm4, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpsubb %xmm3, %xmm0, %xmm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_ashr_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpmovsxbd %xmm0, %zmm0
; GFNIAVX512VL-NEXT: vpsravd %zmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_ashr_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
; GFNIAVX512BW-NEXT: vpmovsxbw %xmm0, %ymm0
; GFNIAVX512BW-NEXT: vpsravw %ymm1, %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%shift = ashr <16 x i8> %a, %b
ret <16 x i8> %shift
}
define <16 x i8> @splatvar_shl_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_shl_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psllw %xmm1, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm2, %xmm2
; GFNISSE-NEXT: psllw %xmm1, %xmm2
; GFNISSE-NEXT: pxor %xmm1, %xmm1
; GFNISSE-NEXT: pshufb %xmm1, %xmm2
; GFNISSE-NEXT: pand %xmm2, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_shl_v16i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsllw %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsllw %xmm1, %xmm2, %xmm1
; GFNIAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_shl_v16i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsllw %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpsllw %xmm1, %xmm2, %xmm1
; GFNIAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; GFNIAVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_shl_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpslld %xmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_shl_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
; GFNIAVX512BW-NEXT: vpsllw %xmm1, %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
%shift = shl <16 x i8> %a, %splat
ret <16 x i8> %shift
}
define <16 x i8> @splatvar_lshr_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_lshr_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psrlw %xmm1, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm2, %xmm2
; GFNISSE-NEXT: psrlw %xmm1, %xmm2
; GFNISSE-NEXT: pshufb {{.*#+}} xmm2 = xmm2[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: pand %xmm2, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_lshr_v16i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
; GFNIAVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_lshr_v16i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
; GFNIAVX2-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; GFNIAVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_lshr_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpsrld %xmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_lshr_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
; GFNIAVX512BW-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
%shift = lshr <16 x i8> %a, %splat
ret <16 x i8> %shift
}
define <16 x i8> @splatvar_ashr_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_ashr_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psrlw %xmm1, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm2, %xmm2
; GFNISSE-NEXT: psrlw %xmm1, %xmm2
; GFNISSE-NEXT: pshufb {{.*#+}} xmm2 = xmm2[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: pand %xmm2, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm2 = [32896,32896,32896,32896,32896,32896,32896,32896]
; GFNISSE-NEXT: psrlw %xmm1, %xmm2
; GFNISSE-NEXT: pxor %xmm2, %xmm0
; GFNISSE-NEXT: psubb %xmm2, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_ashr_v16i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpshufb {{.*#+}} xmm2 = xmm2[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [32896,32896,32896,32896,32896,32896,32896,32896]
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
; GFNIAVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_ashr_v16i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpsrlw $8, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpbroadcastb %xmm2, %xmm2
; GFNIAVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpbroadcastb {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
; GFNIAVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
; GFNIAVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_ashr_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpmovsxbd %xmm0, %zmm0
; GFNIAVX512VL-NEXT: vpsrad %xmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_ashr_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpmovsxbw %xmm0, %ymm0
; GFNIAVX512BW-NEXT: vpsraw %xmm1, %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
%shift = ashr <16 x i8> %a, %splat
ret <16 x i8> %shift
}
define <16 x i8> @constant_shl_v16i8(<16 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_shl_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa %xmm0, %xmm1
; GFNISSE-NEXT: pmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNISSE-NEXT: psllw $8, %xmm1
; GFNISSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNISSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; GFNISSE-NEXT: por %xmm1, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_shl_v16i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vpmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNIAVX1-NEXT: vpsllw $8, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; GFNIAVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_shl_v16i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
; GFNIAVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; GFNIAVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vzeroupper
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: constant_shl_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: constant_shl_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
; GFNIAVX512BW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%shift = shl <16 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <16 x i8> %shift
}
define <16 x i8> @constant_lshr_v16i8(<16 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_lshr_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm1, %xmm0
; GFNISSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; GFNISSE-NEXT: gf2p8mulb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm1, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_lshr_v16i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vmovddup {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: # xmm1 = mem[0,0]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8mulb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_lshr_v16i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; GFNIAVX2-NEXT: vgf2p8mulb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: constant_lshr_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; GFNIAVX512VL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: constant_lshr_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
; GFNIAVX512BW-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%shift = lshr <16 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <16 x i8> %shift
}
define <16 x i8> @constant_ashr_v16i8(<16 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_ashr_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa %xmm0, %xmm1
; GFNISSE-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
; GFNISSE-NEXT: psraw $8, %xmm1
; GFNISSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2,4,8,16,32,64,128,256]
; GFNISSE-NEXT: psrlw $8, %xmm1
; GFNISSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNISSE-NEXT: psraw $8, %xmm0
; GFNISSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [256,128,64,32,16,8,4,2]
; GFNISSE-NEXT: psrlw $8, %xmm0
; GFNISSE-NEXT: packuswb %xmm1, %xmm0
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_ashr_v16i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; GFNIAVX1-NEXT: vpsraw $8, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [2,4,8,16,32,64,128,256]
; GFNIAVX1-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNIAVX1-NEXT: vpsraw $8, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [256,128,64,32,16,8,4,2]
; GFNIAVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_ashr_v16i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovsxbw %xmm0, %ymm0
; GFNIAVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [256,128,64,32,16,8,4,2,2,4,8,16,32,64,128,256]
; GFNIAVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
; GFNIAVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; GFNIAVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
; GFNIAVX2-NEXT: vzeroupper
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: constant_ashr_v16i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovsxbd %xmm0, %zmm0
; GFNIAVX512VL-NEXT: vpsravd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpmovdb %zmm0, %xmm0
; GFNIAVX512VL-NEXT: vzeroupper
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: constant_ashr_v16i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovsxbw %xmm0, %ymm0
; GFNIAVX512BW-NEXT: vpsravw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX512BW-NEXT: vpmovwb %ymm0, %xmm0
; GFNIAVX512BW-NEXT: vzeroupper
; GFNIAVX512BW-NEXT: retq
%shift = ashr <16 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <16 x i8> %shift
}
define <16 x i8> @splatconstant_shl_v16i8(<16 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_shl_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [16,8,4,2,1,0,0,0,16,8,4,2,1,0,0,0]
; GFNISSE-NEXT: retq
;
; GFNIAVX1OR2-LABEL: splatconstant_shl_v16i8:
; GFNIAVX1OR2: # %bb.0:
; GFNIAVX1OR2-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [16,8,4,2,1,0,0,0,16,8,4,2,1,0,0,0]
; GFNIAVX1OR2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_shl_v16i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0 # [16,8,4,2,1,0,0,0,16,8,4,2,1,0,0,0]
; GFNIAVX512-NEXT: retq
%shift = shl <16 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
ret <16 x i8> %shift
}
define <16 x i8> @splatconstant_lshr_v16i8(<16 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_lshr_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128]
; GFNISSE-NEXT: retq
;
; GFNIAVX1OR2-LABEL: splatconstant_lshr_v16i8:
; GFNIAVX1OR2: # %bb.0:
; GFNIAVX1OR2-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128]
; GFNIAVX1OR2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_lshr_v16i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0 # [0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128]
; GFNIAVX512-NEXT: retq
%shift = lshr <16 x i8> %a, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
ret <16 x i8> %shift
}
define <16 x i8> @splatconstant_ashr_v16i8(<16 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_ashr_v16i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [128,128,128,128,128,64,32,16,128,128,128,128,128,64,32,16]
; GFNISSE-NEXT: retq
;
; GFNIAVX1OR2-LABEL: splatconstant_ashr_v16i8:
; GFNIAVX1OR2: # %bb.0:
; GFNIAVX1OR2-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [128,128,128,128,128,64,32,16,128,128,128,128,128,64,32,16]
; GFNIAVX1OR2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_ashr_v16i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0 # [128,128,128,128,128,64,32,16,128,128,128,128,128,64,32,16]
; GFNIAVX512-NEXT: retq
%shift = ashr <16 x i8> %a, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
ret <16 x i8> %shift
}
;
; 256 Bit Vector Shifts
;
define <32 x i8> @var_shl_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; GFNISSE-LABEL: var_shl_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm4 = [9241421688590303745,0]
; GFNISSE-NEXT: movdqa %xmm4, %xmm5
; GFNISSE-NEXT: pshufb %xmm2, %xmm5
; GFNISSE-NEXT: movq {{.*#+}} xmm6 = [72909780498219007,0]
; GFNISSE-NEXT: movdqa %xmm6, %xmm7
; GFNISSE-NEXT: pshufb %xmm2, %xmm7
; GFNISSE-NEXT: pand %xmm7, %xmm0
; GFNISSE-NEXT: gf2p8mulb %xmm5, %xmm0
; GFNISSE-NEXT: pshufb %xmm3, %xmm4
; GFNISSE-NEXT: pshufb %xmm3, %xmm6
; GFNISSE-NEXT: pand %xmm6, %xmm1
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: var_shl_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm3 = [9241421688590303745,0]
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm3, %xmm4
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm3, %xmm3
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm4 = [72909780498219007,0]
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm4, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm4, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8mulb %ymm3, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: var_shl_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX2-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm1, %ymm2, %ymm2
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX2-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; GFNIAVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8mulb %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_shl_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX512VL-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX512VL-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; GFNIAVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vgf2p8mulb %ymm2, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_shl_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
; GFNIAVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%shift = shl <32 x i8> %a, %b
ret <32 x i8> %shift
}
define <32 x i8> @var_lshr_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; GFNISSE-LABEL: var_lshr_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm4 = [72909780498219007,0]
; GFNISSE-NEXT: movdqa %xmm4, %xmm5
; GFNISSE-NEXT: pshufb %xmm2, %xmm5
; GFNISSE-NEXT: movdqa {{.*#+}} xmm6 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm0
; GFNISSE-NEXT: pand %xmm5, %xmm0
; GFNISSE-NEXT: movq {{.*#+}} xmm5 = [9241421688590303745,0]
; GFNISSE-NEXT: movdqa %xmm5, %xmm7
; GFNISSE-NEXT: pshufb %xmm2, %xmm7
; GFNISSE-NEXT: gf2p8mulb %xmm7, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm0
; GFNISSE-NEXT: pshufb %xmm3, %xmm4
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm1
; GFNISSE-NEXT: pand %xmm4, %xmm1
; GFNISSE-NEXT: pshufb %xmm3, %xmm5
; GFNISSE-NEXT: gf2p8mulb %xmm5, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: var_lshr_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm3 = [1,2,4,8,16,32,64,128,0,0,0,0,0,0,0,0]
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm3, %xmm4
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm3, %xmm3
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm4 = [72909780498219007,0]
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm4, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm4, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: vbroadcastsd {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8mulb %ymm3, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: var_lshr_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX2-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm1, %ymm2, %ymm2
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm3, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpand %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX2-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm1, %ymm2, %ymm1
; GFNIAVX2-NEXT: vgf2p8mulb %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm3, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_lshr_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX512VL-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm3 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm3, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpand %ymm2, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX512VL-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm2, %ymm1
; GFNIAVX512VL-NEXT: vgf2p8mulb %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm3, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_lshr_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
; GFNIAVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%shift = lshr <32 x i8> %a, %b
ret <32 x i8> %shift
}
define <32 x i8> @var_ashr_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; GFNISSE-LABEL: var_ashr_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm4 = [9241421688590303745,0]
; GFNISSE-NEXT: movdqa %xmm4, %xmm7
; GFNISSE-NEXT: pshufb %xmm2, %xmm7
; GFNISSE-NEXT: movq {{.*#+}} xmm5 = [72909780498219007,0]
; GFNISSE-NEXT: movdqa %xmm5, %xmm8
; GFNISSE-NEXT: pshufb %xmm2, %xmm8
; GFNISSE-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: movdqa {{.*#+}} xmm6 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm0
; GFNISSE-NEXT: pand %xmm8, %xmm0
; GFNISSE-NEXT: pand %xmm2, %xmm8
; GFNISSE-NEXT: gf2p8mulb %xmm7, %xmm8
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm8
; GFNISSE-NEXT: gf2p8mulb %xmm7, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm0
; GFNISSE-NEXT: pxor %xmm8, %xmm0
; GFNISSE-NEXT: psubb %xmm8, %xmm0
; GFNISSE-NEXT: pshufb %xmm3, %xmm4
; GFNISSE-NEXT: pshufb %xmm3, %xmm5
; GFNISSE-NEXT: pand %xmm5, %xmm2
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm1
; GFNISSE-NEXT: pand %xmm5, %xmm1
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm6, %xmm1
; GFNISSE-NEXT: pxor %xmm2, %xmm1
; GFNISSE-NEXT: psubb %xmm2, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: var_ashr_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm3 = [1,2,4,8,16,32,64,128,0,0,0,0,0,0,0,0]
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm3, %xmm4
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm5 = [72909780498219007,0]
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm5, %xmm2
; GFNIAVX1-NEXT: vbroadcastss {{.*#+}} xmm6 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX1-NEXT: vpand %xmm6, %xmm2, %xmm7
; GFNIAVX1-NEXT: vgf2p8mulb %xmm4, %xmm7, %xmm7
; GFNIAVX1-NEXT: vmovddup {{.*#+}} xmm8 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: # xmm8 = mem[0,0]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm8, %xmm7, %xmm7
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm9
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm8, %xmm9, %xmm9
; GFNIAVX1-NEXT: vpand %xmm2, %xmm9, %xmm2
; GFNIAVX1-NEXT: vgf2p8mulb %xmm4, %xmm2, %xmm2
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpxor %xmm7, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsubb %xmm7, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpshufb %xmm1, %xmm5, %xmm1
; GFNIAVX1-NEXT: vpand %xmm6, %xmm1, %xmm4
; GFNIAVX1-NEXT: vgf2p8mulb %xmm3, %xmm4, %xmm4
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm8, %xmm4, %xmm4
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm8, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8mulb %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm8, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpxor %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpsubb %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: var_ashr_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX2-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm1, %ymm2, %ymm2
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX2-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; GFNIAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm3
; GFNIAVX2-NEXT: vgf2p8mulb %ymm2, %ymm3, %ymm3
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm4, %ymm3, %ymm3
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm4, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8mulb %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm4, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpxor %ymm3, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpsubb %ymm3, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_ashr_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX512VL-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX512VL-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm1
; GFNIAVX512VL-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
; GFNIAVX512VL-NEXT: vgf2p8mulb %ymm2, %ymm3, %ymm3
; GFNIAVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm4, %ymm3, %ymm3
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm4, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vgf2p8mulb %ymm2, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm4, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpxor %ymm3, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpsubb %ymm3, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_ashr_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero
; GFNIAVX512BW-NEXT: vpmovsxbw %ymm0, %zmm0
; GFNIAVX512BW-NEXT: vpsravw %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%shift = ashr <32 x i8> %a, %b
ret <32 x i8> %shift
}
define <32 x i8> @splatvar_shl_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_shl_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psllw %xmm2, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm3, %xmm3
; GFNISSE-NEXT: psllw %xmm2, %xmm3
; GFNISSE-NEXT: pxor %xmm4, %xmm4
; GFNISSE-NEXT: pshufb %xmm4, %xmm3
; GFNISSE-NEXT: pand %xmm3, %xmm0
; GFNISSE-NEXT: psllw %xmm2, %xmm1
; GFNISSE-NEXT: pand %xmm3, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_shl_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsllw %xmm1, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsllw %xmm1, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpshufb %xmm4, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpand %xmm3, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsllw %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_shl_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsllw %xmm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpsllw %xmm1, %xmm2, %xmm1
; GFNIAVX2-NEXT: vpbroadcastb %xmm1, %ymm1
; GFNIAVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_shl_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpsllw %xmm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX512VL-NEXT: vpsllw %xmm1, %xmm2, %xmm1
; GFNIAVX512VL-NEXT: vpbroadcastb %xmm1, %ymm1
; GFNIAVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_shl_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpsllw %xmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <32 x i8> %b, <32 x i8> undef, <32 x i32> zeroinitializer
%shift = shl <32 x i8> %a, %splat
ret <32 x i8> %shift
}
define <32 x i8> @splatvar_lshr_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_lshr_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psrlw %xmm2, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm3, %xmm3
; GFNISSE-NEXT: psrlw %xmm2, %xmm3
; GFNISSE-NEXT: pshufb {{.*#+}} xmm3 = xmm3[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: pand %xmm3, %xmm0
; GFNISSE-NEXT: psrlw %xmm2, %xmm1
; GFNISSE-NEXT: pand %xmm3, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_lshr_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpshufb {{.*#+}} xmm3 = xmm3[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX1-NEXT: vpand %xmm3, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_lshr_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
; GFNIAVX2-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX2-NEXT: vpbroadcastb %xmm1, %ymm1
; GFNIAVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_lshr_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
; GFNIAVX512VL-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX512VL-NEXT: vpbroadcastb %xmm1, %ymm1
; GFNIAVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_lshr_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <32 x i8> %b, <32 x i8> undef, <32 x i32> zeroinitializer
%shift = lshr <32 x i8> %a, %splat
ret <32 x i8> %shift
}
define <32 x i8> @splatvar_ashr_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_ashr_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psrlw %xmm2, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm3, %xmm3
; GFNISSE-NEXT: psrlw %xmm2, %xmm3
; GFNISSE-NEXT: pshufb {{.*#+}} xmm3 = xmm3[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: pand %xmm3, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [32896,32896,32896,32896,32896,32896,32896,32896]
; GFNISSE-NEXT: psrlw %xmm2, %xmm4
; GFNISSE-NEXT: pxor %xmm4, %xmm0
; GFNISSE-NEXT: psubb %xmm4, %xmm0
; GFNISSE-NEXT: psrlw %xmm2, %xmm1
; GFNISSE-NEXT: pand %xmm3, %xmm1
; GFNISSE-NEXT: pxor %xmm4, %xmm1
; GFNISSE-NEXT: psubb %xmm4, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_ashr_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpshufb {{.*#+}} xmm3 = xmm3[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX1-NEXT: vpand %xmm3, %xmm2, %xmm2
; GFNIAVX1-NEXT: vbroadcastss {{.*#+}} xmm4 = [32896,32896,32896,32896,32896,32896,32896,32896]
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpxor %xmm4, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsubb %xmm4, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpxor %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpsubb %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_ashr_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpsrlw $8, %xmm2, %xmm2
; GFNIAVX2-NEXT: vpbroadcastb %xmm2, %ymm2
; GFNIAVX2-NEXT: vpand %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpbroadcastb {{.*#+}} ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
; GFNIAVX2-NEXT: vpsrlw %xmm1, %ymm2, %ymm1
; GFNIAVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpsubb %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_ashr_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm2 = [32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896]
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %xmm3, %xmm1
; GFNIAVX512VL-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX512VL-NEXT: vpbroadcastb %xmm1, %ymm1
; GFNIAVX512VL-NEXT: vpternlogq {{.*#+}} ymm1 = ymm2 ^ (ymm1 & ymm0)
; GFNIAVX512VL-NEXT: vpsubb %ymm2, %ymm1, %ymm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_ashr_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovsxbw %ymm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpsraw %xmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <32 x i8> %b, <32 x i8> undef, <32 x i32> zeroinitializer
%shift = ashr <32 x i8> %a, %splat
ret <32 x i8> %shift
}
define <32 x i8> @constant_shl_v32i8(<32 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_shl_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNISSE-NEXT: movdqa %xmm0, %xmm3
; GFNISSE-NEXT: pmullw %xmm2, %xmm3
; GFNISSE-NEXT: pmovzxbw {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
; GFNISSE-NEXT: pand %xmm4, %xmm3
; GFNISSE-NEXT: movdqa {{.*#+}} xmm5 = [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNISSE-NEXT: pmaddubsw %xmm5, %xmm0
; GFNISSE-NEXT: psllw $8, %xmm0
; GFNISSE-NEXT: por %xmm3, %xmm0
; GFNISSE-NEXT: pmullw %xmm1, %xmm2
; GFNISSE-NEXT: pand %xmm4, %xmm2
; GFNISSE-NEXT: pmaddubsw %xmm5, %xmm1
; GFNISSE-NEXT: psllw $8, %xmm1
; GFNISSE-NEXT: por %xmm2, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_shl_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNIAVX1-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm2
; GFNIAVX1-NEXT: vpsllw $8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; GFNIAVX1-NEXT: vpmaddubsw %xmm1, %xmm3, %xmm1
; GFNIAVX1-NEXT: vpsllw $8, %xmm1, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; GFNIAVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX1-NEXT: vpmullw %xmm2, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpmullw %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
; GFNIAVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_shl_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm1 # [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1,0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNIAVX2-NEXT: vpsllw $8, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: constant_shl_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm1 # [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX512VL-NEXT: vpmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1,0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNIAVX512VL-NEXT: vpsllw $8, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpternlogd {{.*#+}} ymm0 = ymm0 | (ymm1 & m32bcst)
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: constant_shl_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
; GFNIAVX512BW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%shift = shl <32 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <32 x i8> %shift
}
define <32 x i8> @constant_lshr_v32i8(<32 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_lshr_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm3 = [255,127,63,31,15,7,3,1,1,3,7,15,31,63,127,255]
; GFNISSE-NEXT: pand %xmm3, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm1
; GFNISSE-NEXT: pand %xmm3, %xmm1
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_lshr_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vbroadcastsd {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm1, %ymm0, %ymm0
; GFNIAVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8mulb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm1, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_lshr_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8mulb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: constant_lshr_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vgf2p8mulb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: constant_lshr_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
; GFNIAVX512BW-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%shift = lshr <32 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <32 x i8> %shift
}
define <32 x i8> @constant_ashr_v32i8(<32 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_ashr_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa %xmm0, %xmm2
; GFNISSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15]
; GFNISSE-NEXT: psraw $8, %xmm2
; GFNISSE-NEXT: movdqa {{.*#+}} xmm3 = [2,4,8,16,32,64,128,256]
; GFNISSE-NEXT: pmullw %xmm3, %xmm2
; GFNISSE-NEXT: psrlw $8, %xmm2
; GFNISSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNISSE-NEXT: psraw $8, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [256,128,64,32,16,8,4,2]
; GFNISSE-NEXT: pmullw %xmm4, %xmm0
; GFNISSE-NEXT: psrlw $8, %xmm0
; GFNISSE-NEXT: packuswb %xmm2, %xmm0
; GFNISSE-NEXT: movdqa %xmm1, %xmm2
; GFNISSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
; GFNISSE-NEXT: psraw $8, %xmm2
; GFNISSE-NEXT: pmullw %xmm3, %xmm2
; GFNISSE-NEXT: psrlw $8, %xmm2
; GFNISSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNISSE-NEXT: psraw $8, %xmm1
; GFNISSE-NEXT: pmullw %xmm4, %xmm1
; GFNISSE-NEXT: psrlw $8, %xmm1
; GFNISSE-NEXT: packuswb %xmm2, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_ashr_v32i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; GFNIAVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; GFNIAVX1-NEXT: vpsraw $8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [2,4,8,16,32,64,128,256]
; GFNIAVX1-NEXT: vpmullw %xmm3, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsrlw $8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNIAVX1-NEXT: vpsraw $8, %xmm1, %xmm1
; GFNIAVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [256,128,64,32,16,8,4,2]
; GFNIAVX1-NEXT: vpmullw %xmm4, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; GFNIAVX1-NEXT: vpsraw $8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpmullw %xmm3, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpsrlw $8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNIAVX1-NEXT: vpsraw $8, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpmullw %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_ashr_v32i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpunpckhbw {{.*#+}} ymm1 = ymm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
; GFNIAVX2-NEXT: vpsraw $8, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [2,4,8,16,32,64,128,256,2,4,8,16,32,64,128,256]
; GFNIAVX2-NEXT: vpsrlw $8, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
; GFNIAVX2-NEXT: vpsraw $8, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2]
; GFNIAVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpackuswb %ymm1, %ymm0, %ymm0
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: constant_ashr_v32i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm1 = ymm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
; GFNIAVX512VL-NEXT: vpsraw $8, %ymm1, %ymm1
; GFNIAVX512VL-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [2,4,8,16,32,64,128,256,2,4,8,16,32,64,128,256]
; GFNIAVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
; GFNIAVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
; GFNIAVX512VL-NEXT: vpsraw $8, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2]
; GFNIAVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpackuswb %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: constant_ashr_v32i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovsxbw %ymm0, %zmm0
; GFNIAVX512BW-NEXT: vpsravw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpmovwb %zmm0, %ymm0
; GFNIAVX512BW-NEXT: retq
%shift = ashr <32 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <32 x i8> %shift
}
define <32 x i8> @splatconstant_shl_v32i8(<32 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_shl_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovsxwq {{.*#+}} xmm2 = [258,258]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1OR2-LABEL: splatconstant_shl_v32i8:
; GFNIAVX1OR2: # %bb.0:
; GFNIAVX1OR2-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [2,1,0,0,0,0,0,0,2,1,0,0,0,0,0,0,2,1,0,0,0,0,0,0,2,1,0,0,0,0,0,0]
; GFNIAVX1OR2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_shl_v32i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm0, %ymm0 # [2,1,0,0,0,0,0,0,2,1,0,0,0,0,0,0,2,1,0,0,0,0,0,0,2,1,0,0,0,0,0,0]
; GFNIAVX512-NEXT: retq
%shift = shl <32 x i8> %a, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>
ret <32 x i8> %shift
}
define <32 x i8> @splatconstant_lshr_v32i8(<32 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_lshr_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm2 = [0,128,64,32,16,8,4,2,0,128,64,32,16,8,4,2]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1OR2-LABEL: splatconstant_lshr_v32i8:
; GFNIAVX1OR2: # %bb.0:
; GFNIAVX1OR2-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [0,128,64,32,16,8,4,2,0,128,64,32,16,8,4,2,0,128,64,32,16,8,4,2,0,128,64,32,16,8,4,2]
; GFNIAVX1OR2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_lshr_v32i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm0, %ymm0 # [0,128,64,32,16,8,4,2,0,128,64,32,16,8,4,2,0,128,64,32,16,8,4,2,0,128,64,32,16,8,4,2]
; GFNIAVX512-NEXT: retq
%shift = lshr <32 x i8> %a, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <32 x i8> %shift
}
define <32 x i8> @splatconstant_ashr_v32i8(<32 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_ashr_v32i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm2 = [128,128,128,64,32,16,8,4,128,128,128,64,32,16,8,4]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm2, %xmm1
; GFNISSE-NEXT: retq
;
; GFNIAVX1OR2-LABEL: splatconstant_ashr_v32i8:
; GFNIAVX1OR2: # %bb.0:
; GFNIAVX1OR2-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [128,128,128,64,32,16,8,4,128,128,128,64,32,16,8,4,128,128,128,64,32,16,8,4,128,128,128,64,32,16,8,4]
; GFNIAVX1OR2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_ashr_v32i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm0, %ymm0 # [128,128,128,64,32,16,8,4,128,128,128,64,32,16,8,4,128,128,128,64,32,16,8,4,128,128,128,64,32,16,8,4]
; GFNIAVX512-NEXT: retq
%shift = ashr <32 x i8> %a, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
ret <32 x i8> %shift
}
;
; 512 Bit Vector Shifts
;
define <64 x i8> @var_shl_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; GFNISSE-LABEL: var_shl_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm8 = [9241421688590303745,0]
; GFNISSE-NEXT: movdqa %xmm8, %xmm9
; GFNISSE-NEXT: pshufb %xmm4, %xmm9
; GFNISSE-NEXT: movq {{.*#+}} xmm10 = [72909780498219007,0]
; GFNISSE-NEXT: movdqa %xmm10, %xmm11
; GFNISSE-NEXT: pshufb %xmm4, %xmm11
; GFNISSE-NEXT: pand %xmm11, %xmm0
; GFNISSE-NEXT: gf2p8mulb %xmm9, %xmm0
; GFNISSE-NEXT: movdqa %xmm8, %xmm4
; GFNISSE-NEXT: pshufb %xmm5, %xmm4
; GFNISSE-NEXT: movdqa %xmm10, %xmm9
; GFNISSE-NEXT: pshufb %xmm5, %xmm9
; GFNISSE-NEXT: pand %xmm9, %xmm1
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm1
; GFNISSE-NEXT: movdqa %xmm8, %xmm4
; GFNISSE-NEXT: pshufb %xmm6, %xmm4
; GFNISSE-NEXT: movdqa %xmm10, %xmm5
; GFNISSE-NEXT: pshufb %xmm6, %xmm5
; GFNISSE-NEXT: pand %xmm5, %xmm2
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm2
; GFNISSE-NEXT: pshufb %xmm7, %xmm8
; GFNISSE-NEXT: pshufb %xmm7, %xmm10
; GFNISSE-NEXT: pand %xmm10, %xmm3
; GFNISSE-NEXT: gf2p8mulb %xmm8, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: var_shl_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm2, %xmm4
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm5 = [9241421688590303745,0]
; GFNIAVX1-NEXT: vpshufb %xmm4, %xmm5, %xmm6
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm5, %xmm7
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm6, %ymm7, %ymm6
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm7 = [72909780498219007,0]
; GFNIAVX1-NEXT: vpshufb %xmm4, %xmm7, %xmm4
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2
; GFNIAVX1-NEXT: vandps %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8mulb %ymm6, %ymm0, %ymm0
; GFNIAVX1-NEXT: vextractf128 $1, %ymm3, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm5, %xmm4
; GFNIAVX1-NEXT: vpshufb %xmm3, %xmm5, %xmm5
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm4
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm3, %xmm7, %xmm3
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
; GFNIAVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: vgf2p8mulb %ymm4, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: var_shl_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX2-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm2, %ymm4, %ymm5
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm6 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX2-NEXT: # ymm6 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm2, %ymm6, %ymm2
; GFNIAVX2-NEXT: vpand %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8mulb %ymm5, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpshufb %ymm3, %ymm4, %ymm2
; GFNIAVX2-NEXT: vpshufb %ymm3, %ymm6, %ymm3
; GFNIAVX2-NEXT: vpand %ymm3, %ymm1, %ymm1
; GFNIAVX2-NEXT: vgf2p8mulb %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_shl_v64i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm2
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX512VL-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm4
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm3
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm4, %zmm3, %zmm3
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX512VL-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm2, %ymm4, %ymm2
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm4, %ymm1
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm1
; GFNIAVX512VL-NEXT: vpandq %zmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vgf2p8mulb %zmm3, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_shl_v64i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [9241421688590303745,0,9241421688590303745,0,9241421688590303745,0,9241421688590303745,0]
; GFNIAVX512BW-NEXT: # zmm2 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; GFNIAVX512BW-NEXT: vpshufb %zmm1, %zmm2, %zmm2
; GFNIAVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm3 = [72909780498219007,0,72909780498219007,0,72909780498219007,0,72909780498219007,0]
; GFNIAVX512BW-NEXT: # zmm3 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; GFNIAVX512BW-NEXT: vpshufb %zmm1, %zmm3, %zmm1
; GFNIAVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vgf2p8mulb %zmm2, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: retq
%shift = shl <64 x i8> %a, %b
ret <64 x i8> %shift
}
define <64 x i8> @var_lshr_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; GFNISSE-LABEL: var_lshr_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm9 = [72909780498219007,0]
; GFNISSE-NEXT: movdqa %xmm9, %xmm10
; GFNISSE-NEXT: pshufb %xmm4, %xmm10
; GFNISSE-NEXT: movdqa {{.*#+}} xmm8 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm8, %xmm0
; GFNISSE-NEXT: pand %xmm10, %xmm0
; GFNISSE-NEXT: movq {{.*#+}} xmm10 = [9241421688590303745,0]
; GFNISSE-NEXT: movdqa %xmm10, %xmm11
; GFNISSE-NEXT: pshufb %xmm4, %xmm11
; GFNISSE-NEXT: gf2p8mulb %xmm11, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm8, %xmm0
; GFNISSE-NEXT: movdqa %xmm9, %xmm4
; GFNISSE-NEXT: pshufb %xmm5, %xmm4
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm8, %xmm1
; GFNISSE-NEXT: pand %xmm4, %xmm1
; GFNISSE-NEXT: movdqa %xmm10, %xmm4
; GFNISSE-NEXT: pshufb %xmm5, %xmm4
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm8, %xmm1
; GFNISSE-NEXT: movdqa %xmm9, %xmm4
; GFNISSE-NEXT: pshufb %xmm6, %xmm4
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm8, %xmm2
; GFNISSE-NEXT: pand %xmm4, %xmm2
; GFNISSE-NEXT: movdqa %xmm10, %xmm4
; GFNISSE-NEXT: pshufb %xmm6, %xmm4
; GFNISSE-NEXT: gf2p8mulb %xmm4, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm8, %xmm2
; GFNISSE-NEXT: pshufb %xmm7, %xmm9
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm8, %xmm3
; GFNISSE-NEXT: pand %xmm9, %xmm3
; GFNISSE-NEXT: pshufb %xmm7, %xmm10
; GFNISSE-NEXT: gf2p8mulb %xmm10, %xmm3
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm8, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: var_lshr_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm2, %xmm4
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm5 = [1,2,4,8,16,32,64,128,0,0,0,0,0,0,0,0]
; GFNIAVX1-NEXT: vpshufb %xmm4, %xmm5, %xmm6
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm5, %xmm7
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm6, %ymm7, %ymm6
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm7 = [72909780498219007,0]
; GFNIAVX1-NEXT: vpshufb %xmm4, %xmm7, %xmm4
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2
; GFNIAVX1-NEXT: vbroadcastsd {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm4, %ymm0, %ymm0
; GFNIAVX1-NEXT: vandps %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8mulb %ymm6, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm4, %ymm0, %ymm0
; GFNIAVX1-NEXT: vextractf128 $1, %ymm3, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm5, %xmm6
; GFNIAVX1-NEXT: vpshufb %xmm3, %xmm5, %xmm5
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm3, %xmm7, %xmm3
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm4, %ymm1, %ymm1
; GFNIAVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: vgf2p8mulb %ymm5, %ymm1, %ymm1
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm4, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: var_lshr_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX2-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm2, %ymm4, %ymm5
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm6 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm6, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpand %ymm5, %ymm0, %ymm0
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX2-NEXT: # ymm5 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm2, %ymm5, %ymm2
; GFNIAVX2-NEXT: vgf2p8mulb %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm6, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpshufb %ymm3, %ymm4, %ymm2
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm6, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpand %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpshufb %ymm3, %ymm5, %ymm2
; GFNIAVX2-NEXT: vgf2p8mulb %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm6, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_lshr_v64i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm2
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX512VL-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm4
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm3
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm4, %zmm3, %zmm3
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX512VL-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm2, %ymm4, %ymm2
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm4, %ymm1
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm1
; GFNIAVX512VL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %zmm2, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpandq %zmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vgf2p8mulb %zmm3, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %zmm2, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_lshr_v64i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [72909780498219007,0,72909780498219007,0,72909780498219007,0,72909780498219007,0]
; GFNIAVX512BW-NEXT: # zmm2 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; GFNIAVX512BW-NEXT: vpshufb %zmm1, %zmm2, %zmm2
; GFNIAVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm3 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX512BW-NEXT: vgf2p8affineqb $0, %zmm3, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpandq %zmm2, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [9241421688590303745,0,9241421688590303745,0,9241421688590303745,0,9241421688590303745,0]
; GFNIAVX512BW-NEXT: # zmm2 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; GFNIAVX512BW-NEXT: vpshufb %zmm1, %zmm2, %zmm1
; GFNIAVX512BW-NEXT: vgf2p8mulb %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vgf2p8affineqb $0, %zmm3, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: retq
%shift = lshr <64 x i8> %a, %b
ret <64 x i8> %shift
}
define <64 x i8> @var_ashr_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; GFNISSE-LABEL: var_ashr_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movq {{.*#+}} xmm8 = [9241421688590303745,0]
; GFNISSE-NEXT: movdqa %xmm8, %xmm11
; GFNISSE-NEXT: pshufb %xmm4, %xmm11
; GFNISSE-NEXT: movq {{.*#+}} xmm9 = [72909780498219007,0]
; GFNISSE-NEXT: movdqa %xmm9, %xmm12
; GFNISSE-NEXT: pshufb %xmm4, %xmm12
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: movdqa {{.*#+}} xmm10 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm0
; GFNISSE-NEXT: pand %xmm12, %xmm0
; GFNISSE-NEXT: pand %xmm4, %xmm12
; GFNISSE-NEXT: gf2p8mulb %xmm11, %xmm12
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm12
; GFNISSE-NEXT: gf2p8mulb %xmm11, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm0
; GFNISSE-NEXT: pxor %xmm12, %xmm0
; GFNISSE-NEXT: psubb %xmm12, %xmm0
; GFNISSE-NEXT: movdqa %xmm8, %xmm11
; GFNISSE-NEXT: pshufb %xmm5, %xmm11
; GFNISSE-NEXT: movdqa %xmm9, %xmm12
; GFNISSE-NEXT: pshufb %xmm5, %xmm12
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm1
; GFNISSE-NEXT: pand %xmm12, %xmm1
; GFNISSE-NEXT: pand %xmm4, %xmm12
; GFNISSE-NEXT: gf2p8mulb %xmm11, %xmm12
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm12
; GFNISSE-NEXT: gf2p8mulb %xmm11, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm1
; GFNISSE-NEXT: pxor %xmm12, %xmm1
; GFNISSE-NEXT: psubb %xmm12, %xmm1
; GFNISSE-NEXT: movdqa %xmm8, %xmm5
; GFNISSE-NEXT: pshufb %xmm6, %xmm5
; GFNISSE-NEXT: movdqa %xmm9, %xmm11
; GFNISSE-NEXT: pshufb %xmm6, %xmm11
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm2
; GFNISSE-NEXT: pand %xmm11, %xmm2
; GFNISSE-NEXT: pand %xmm4, %xmm11
; GFNISSE-NEXT: gf2p8mulb %xmm5, %xmm11
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm11
; GFNISSE-NEXT: gf2p8mulb %xmm5, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm2
; GFNISSE-NEXT: pxor %xmm11, %xmm2
; GFNISSE-NEXT: psubb %xmm11, %xmm2
; GFNISSE-NEXT: pshufb %xmm7, %xmm8
; GFNISSE-NEXT: pshufb %xmm7, %xmm9
; GFNISSE-NEXT: pand %xmm9, %xmm4
; GFNISSE-NEXT: gf2p8mulb %xmm8, %xmm4
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm4
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm3
; GFNISSE-NEXT: pand %xmm9, %xmm3
; GFNISSE-NEXT: gf2p8mulb %xmm8, %xmm3
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm10, %xmm3
; GFNISSE-NEXT: pxor %xmm4, %xmm3
; GFNISSE-NEXT: psubb %xmm4, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: var_ashr_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm2, %xmm4
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm5 = [1,2,4,8,16,32,64,128,0,0,0,0,0,0,0,0]
; GFNIAVX1-NEXT: vpshufb %xmm4, %xmm5, %xmm8
; GFNIAVX1-NEXT: vmovq {{.*#+}} xmm6 = [72909780498219007,0]
; GFNIAVX1-NEXT: vpshufb %xmm4, %xmm6, %xmm9
; GFNIAVX1-NEXT: vbroadcastss {{.*#+}} xmm7 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX1-NEXT: vpand %xmm7, %xmm9, %xmm4
; GFNIAVX1-NEXT: vgf2p8mulb %xmm8, %xmm4, %xmm10
; GFNIAVX1-NEXT: vmovddup {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: # xmm4 = mem[0,0]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm10, %xmm10
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm11
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm11, %xmm11
; GFNIAVX1-NEXT: vpand %xmm9, %xmm11, %xmm9
; GFNIAVX1-NEXT: vgf2p8mulb %xmm8, %xmm9, %xmm8
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm8, %xmm8
; GFNIAVX1-NEXT: vpxor %xmm10, %xmm8, %xmm8
; GFNIAVX1-NEXT: vpsubb %xmm10, %xmm8, %xmm8
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm5, %xmm9
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm2
; GFNIAVX1-NEXT: vpand %xmm7, %xmm2, %xmm10
; GFNIAVX1-NEXT: vgf2p8mulb %xmm9, %xmm10, %xmm10
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm10, %xmm10
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8mulb %xmm9, %xmm0, %xmm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpxor %xmm0, %xmm10, %xmm0
; GFNIAVX1-NEXT: vpsubb %xmm10, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm8, %ymm0, %ymm0
; GFNIAVX1-NEXT: vextractf128 $1, %ymm3, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm5, %xmm8
; GFNIAVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm2
; GFNIAVX1-NEXT: vpand %xmm7, %xmm2, %xmm9
; GFNIAVX1-NEXT: vgf2p8mulb %xmm8, %xmm9, %xmm9
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm9, %xmm9
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm10
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm10, %xmm10
; GFNIAVX1-NEXT: vpand %xmm2, %xmm10, %xmm2
; GFNIAVX1-NEXT: vgf2p8mulb %xmm8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpxor %xmm2, %xmm9, %xmm2
; GFNIAVX1-NEXT: vpsubb %xmm9, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpshufb %xmm3, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpshufb %xmm3, %xmm6, %xmm3
; GFNIAVX1-NEXT: vpand %xmm7, %xmm3, %xmm6
; GFNIAVX1-NEXT: vgf2p8mulb %xmm5, %xmm6, %xmm6
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm6, %xmm6
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpand %xmm3, %xmm1, %xmm1
; GFNIAVX1-NEXT: vgf2p8mulb %xmm5, %xmm1, %xmm1
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %xmm4, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpxor %xmm6, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpsubb %xmm6, %xmm1, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: var_ashr_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX2-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm2, %ymm4, %ymm5
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm6 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX2-NEXT: # ymm6 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpshufb %ymm2, %ymm6, %ymm2
; GFNIAVX2-NEXT: vpbroadcastb {{.*#+}} ymm7 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX2-NEXT: vpand %ymm7, %ymm2, %ymm8
; GFNIAVX2-NEXT: vgf2p8mulb %ymm5, %ymm8, %ymm8
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm9 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm9, %ymm8, %ymm8
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm9, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpand %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8mulb %ymm5, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm9, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpxor %ymm0, %ymm8, %ymm0
; GFNIAVX2-NEXT: vpsubb %ymm8, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpshufb %ymm3, %ymm4, %ymm2
; GFNIAVX2-NEXT: vpshufb %ymm3, %ymm6, %ymm3
; GFNIAVX2-NEXT: vpand %ymm7, %ymm3, %ymm4
; GFNIAVX2-NEXT: vgf2p8mulb %ymm2, %ymm4, %ymm4
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm9, %ymm4, %ymm4
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm9, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpand %ymm3, %ymm1, %ymm1
; GFNIAVX2-NEXT: vgf2p8mulb %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm9, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpxor %ymm4, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpsubb %ymm4, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: var_ashr_v64i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm2
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [9241421688590303745,0,9241421688590303745,0]
; GFNIAVX512VL-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm2, %ymm3, %ymm4
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [72909780498219007,0,72909780498219007,0]
; GFNIAVX512VL-NEXT: # ymm5 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpshufb %ymm2, %ymm5, %ymm2
; GFNIAVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm6 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX512VL-NEXT: vpand %ymm6, %ymm2, %ymm7
; GFNIAVX512VL-NEXT: vgf2p8mulb %ymm4, %ymm7, %ymm7
; GFNIAVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm8 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm8, %ymm7, %ymm7
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm9
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm8, %ymm9, %ymm9
; GFNIAVX512VL-NEXT: vpand %ymm2, %ymm9, %ymm2
; GFNIAVX512VL-NEXT: vgf2p8mulb %ymm4, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm8, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpxor %ymm7, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpsubb %ymm7, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm3, %ymm3
; GFNIAVX512VL-NEXT: vpshufb %ymm1, %ymm5, %ymm1
; GFNIAVX512VL-NEXT: vpand %ymm6, %ymm1, %ymm4
; GFNIAVX512VL-NEXT: vgf2p8mulb %ymm3, %ymm4, %ymm4
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm8, %ymm4, %ymm4
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm8, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vgf2p8mulb %ymm3, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vgf2p8affineqb $0, %ymm8, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpxor %ymm4, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpsubb %ymm4, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: var_ashr_v64i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpsrlw $8, %zmm1, %zmm2
; GFNIAVX512BW-NEXT: vpsravw %zmm2, %zmm0, %zmm2
; GFNIAVX512BW-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm1, %zmm1
; GFNIAVX512BW-NEXT: vpsllw $8, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpsraw $8, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpsravw %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: movabsq $6148914691236517205, %rax # imm = 0x5555555555555555
; GFNIAVX512BW-NEXT: kmovq %rax, %k1
; GFNIAVX512BW-NEXT: vmovdqu8 %zmm0, %zmm2 {%k1}
; GFNIAVX512BW-NEXT: vmovdqa64 %zmm2, %zmm0
; GFNIAVX512BW-NEXT: retq
%shift = ashr <64 x i8> %a, %b
ret <64 x i8> %shift
}
define <64 x i8> @splatvar_shl_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_shl_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,zero,zero,zero,zero,xmm4[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psllw %xmm4, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm5, %xmm5
; GFNISSE-NEXT: psllw %xmm4, %xmm5
; GFNISSE-NEXT: pxor %xmm6, %xmm6
; GFNISSE-NEXT: pshufb %xmm6, %xmm5
; GFNISSE-NEXT: pand %xmm5, %xmm0
; GFNISSE-NEXT: psllw %xmm4, %xmm1
; GFNISSE-NEXT: pand %xmm5, %xmm1
; GFNISSE-NEXT: psllw %xmm4, %xmm2
; GFNISSE-NEXT: pand %xmm5, %xmm2
; GFNISSE-NEXT: psllw %xmm4, %xmm3
; GFNISSE-NEXT: pand %xmm5, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_shl_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsllw %xmm2, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpsllw %xmm2, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpxor %xmm5, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpshufb %xmm5, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpand %xmm4, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsllw %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; GFNIAVX1-NEXT: vpsllw %xmm2, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpand %xmm4, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsllw %xmm2, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpand %xmm4, %xmm1, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_shl_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsllw %xmm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpsllw %xmm2, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpbroadcastb %xmm3, %ymm3
; GFNIAVX2-NEXT: vpand %ymm3, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpsllw %xmm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpand %ymm3, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_shl_v64i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpsllw %xmm1, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpsllw %xmm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX512VL-NEXT: vpsllw %xmm1, %xmm2, %xmm1
; GFNIAVX512VL-NEXT: vpbroadcastb %xmm1, %ymm1
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; GFNIAVX512VL-NEXT: vpandq %zmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_shl_v64i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpsllw %xmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX512BW-NEXT: vpsllw %xmm1, %xmm2, %xmm1
; GFNIAVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1
; GFNIAVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <64 x i8> %b, <64 x i8> undef, <64 x i32> zeroinitializer
%shift = shl <64 x i8> %a, %splat
ret <64 x i8> %shift
}
define <64 x i8> @splatvar_lshr_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_lshr_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,zero,zero,zero,zero,xmm4[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psrlw %xmm4, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm5, %xmm5
; GFNISSE-NEXT: psrlw %xmm4, %xmm5
; GFNISSE-NEXT: pshufb {{.*#+}} xmm5 = xmm5[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: pand %xmm5, %xmm0
; GFNISSE-NEXT: psrlw %xmm4, %xmm1
; GFNISSE-NEXT: pand %xmm5, %xmm1
; GFNISSE-NEXT: psrlw %xmm4, %xmm2
; GFNISSE-NEXT: pand %xmm5, %xmm2
; GFNISSE-NEXT: psrlw %xmm4, %xmm3
; GFNISSE-NEXT: pand %xmm5, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_lshr_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpshufb {{.*#+}} xmm4 = xmm4[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX1-NEXT: vpand %xmm4, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpand %xmm4, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpand %xmm4, %xmm1, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_lshr_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsrlw %xmm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpsrlw %xmm2, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpsrlw $8, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpbroadcastb %xmm3, %ymm3
; GFNIAVX2-NEXT: vpand %ymm3, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpsrlw %xmm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpand %ymm3, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_lshr_v64i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
; GFNIAVX512VL-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX512VL-NEXT: vpbroadcastb %xmm1, %ymm1
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; GFNIAVX512VL-NEXT: vpandq %zmm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_lshr_v64i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; GFNIAVX512BW-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
; GFNIAVX512BW-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1
; GFNIAVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <64 x i8> %b, <64 x i8> undef, <64 x i32> zeroinitializer
%shift = lshr <64 x i8> %a, %splat
ret <64 x i8> %shift
}
define <64 x i8> @splatvar_ashr_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; GFNISSE-LABEL: splatvar_ashr_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovzxbq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,zero,zero,zero,zero,xmm4[1],zero,zero,zero,zero,zero,zero,zero
; GFNISSE-NEXT: psrlw %xmm4, %xmm0
; GFNISSE-NEXT: pcmpeqd %xmm5, %xmm5
; GFNISSE-NEXT: psrlw %xmm4, %xmm5
; GFNISSE-NEXT: pshufb {{.*#+}} xmm5 = xmm5[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNISSE-NEXT: pand %xmm5, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm6 = [32896,32896,32896,32896,32896,32896,32896,32896]
; GFNISSE-NEXT: psrlw %xmm4, %xmm6
; GFNISSE-NEXT: pxor %xmm6, %xmm0
; GFNISSE-NEXT: psubb %xmm6, %xmm0
; GFNISSE-NEXT: psrlw %xmm4, %xmm1
; GFNISSE-NEXT: pand %xmm5, %xmm1
; GFNISSE-NEXT: pxor %xmm6, %xmm1
; GFNISSE-NEXT: psubb %xmm6, %xmm1
; GFNISSE-NEXT: psrlw %xmm4, %xmm2
; GFNISSE-NEXT: pand %xmm5, %xmm2
; GFNISSE-NEXT: pxor %xmm6, %xmm2
; GFNISSE-NEXT: psubb %xmm6, %xmm2
; GFNISSE-NEXT: psrlw %xmm4, %xmm3
; GFNISSE-NEXT: pand %xmm5, %xmm3
; GFNISSE-NEXT: pxor %xmm6, %xmm3
; GFNISSE-NEXT: psubb %xmm6, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatvar_ashr_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; GFNIAVX1-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpshufb {{.*#+}} xmm4 = xmm4[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; GFNIAVX1-NEXT: vpand %xmm4, %xmm3, %xmm3
; GFNIAVX1-NEXT: vbroadcastss {{.*#+}} xmm5 = [32896,32896,32896,32896,32896,32896,32896,32896]
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpxor %xmm5, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsubb %xmm5, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpand %xmm4, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpxor %xmm5, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpsubb %xmm5, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpand %xmm4, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpxor %xmm5, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsubb %xmm5, %xmm3, %xmm3
; GFNIAVX1-NEXT: vpsrlw %xmm2, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpand %xmm4, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpxor %xmm5, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpsubb %xmm5, %xmm1, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatvar_ashr_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX2-NEXT: vpsrlw %xmm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpsrlw %xmm2, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpsrlw $8, %xmm3, %xmm3
; GFNIAVX2-NEXT: vpbroadcastb %xmm3, %ymm3
; GFNIAVX2-NEXT: vpand %ymm3, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpbroadcastb {{.*#+}} ymm4 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
; GFNIAVX2-NEXT: vpsrlw %xmm2, %ymm4, %ymm4
; GFNIAVX2-NEXT: vpxor %ymm4, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpsubb %ymm4, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpsrlw %xmm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpand %ymm3, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpxor %ymm4, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpsubb %ymm4, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: splatvar_ashr_v64i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2
; GFNIAVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm3 = [32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896,32896]
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %ymm3, %ymm3
; GFNIAVX512VL-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %xmm4, %xmm4
; GFNIAVX512VL-NEXT: vpsrlw $8, %xmm4, %xmm4
; GFNIAVX512VL-NEXT: vpbroadcastb %xmm4, %ymm4
; GFNIAVX512VL-NEXT: vpternlogq {{.*#+}} ymm2 = ymm3 ^ (ymm2 & ymm4)
; GFNIAVX512VL-NEXT: vpsubb %ymm3, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = ymm3 ^ (ymm0 & ymm4)
; GFNIAVX512VL-NEXT: vpsubb %ymm3, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: splatvar_ashr_v64i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
; GFNIAVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpbroadcastb {{.*#+}} zmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
; GFNIAVX512BW-NEXT: vpsrlw %xmm1, %zmm2, %zmm2
; GFNIAVX512BW-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; GFNIAVX512BW-NEXT: vpsrlw %xmm1, %xmm3, %xmm1
; GFNIAVX512BW-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1
; GFNIAVX512BW-NEXT: vpternlogq {{.*#+}} zmm1 = zmm2 ^ (zmm1 & zmm0)
; GFNIAVX512BW-NEXT: vpsubb %zmm2, %zmm1, %zmm0
; GFNIAVX512BW-NEXT: retq
%splat = shufflevector <64 x i8> %b, <64 x i8> undef, <64 x i32> zeroinitializer
%shift = ashr <64 x i8> %a, %splat
ret <64 x i8> %shift
}
define <64 x i8> @constant_shl_v64i8(<64 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_shl_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNISSE-NEXT: movdqa %xmm0, %xmm6
; GFNISSE-NEXT: pmullw %xmm4, %xmm6
; GFNISSE-NEXT: pmovzxbw {{.*#+}} xmm5 = [255,255,255,255,255,255,255,255]
; GFNISSE-NEXT: pand %xmm5, %xmm6
; GFNISSE-NEXT: movdqa {{.*#+}} xmm7 = [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNISSE-NEXT: pmaddubsw %xmm7, %xmm0
; GFNISSE-NEXT: psllw $8, %xmm0
; GFNISSE-NEXT: por %xmm6, %xmm0
; GFNISSE-NEXT: movdqa %xmm1, %xmm6
; GFNISSE-NEXT: pmullw %xmm4, %xmm6
; GFNISSE-NEXT: pand %xmm5, %xmm6
; GFNISSE-NEXT: pmaddubsw %xmm7, %xmm1
; GFNISSE-NEXT: psllw $8, %xmm1
; GFNISSE-NEXT: por %xmm6, %xmm1
; GFNISSE-NEXT: movdqa %xmm2, %xmm6
; GFNISSE-NEXT: pmullw %xmm4, %xmm6
; GFNISSE-NEXT: pand %xmm5, %xmm6
; GFNISSE-NEXT: pmaddubsw %xmm7, %xmm2
; GFNISSE-NEXT: psllw $8, %xmm2
; GFNISSE-NEXT: por %xmm6, %xmm2
; GFNISSE-NEXT: pmullw %xmm3, %xmm4
; GFNISSE-NEXT: pand %xmm5, %xmm4
; GFNISSE-NEXT: pmaddubsw %xmm7, %xmm3
; GFNISSE-NEXT: psllw $8, %xmm3
; GFNISSE-NEXT: por %xmm4, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_shl_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNIAVX1-NEXT: vpmaddubsw %xmm2, %xmm0, %xmm3
; GFNIAVX1-NEXT: vpsllw $8, %xmm3, %xmm3
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
; GFNIAVX1-NEXT: vpmaddubsw %xmm2, %xmm4, %xmm5
; GFNIAVX1-NEXT: vpsllw $8, %xmm5, %xmm5
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm3
; GFNIAVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX1-NEXT: vpmullw %xmm5, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpmullw %xmm5, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0
; GFNIAVX1-NEXT: vbroadcastss {{.*#+}} ymm4 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]
; GFNIAVX1-NEXT: vandps %ymm4, %ymm0, %ymm0
; GFNIAVX1-NEXT: vorps %ymm3, %ymm0, %ymm0
; GFNIAVX1-NEXT: vpmaddubsw %xmm2, %xmm1, %xmm3
; GFNIAVX1-NEXT: vpsllw $8, %xmm3, %xmm3
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm6
; GFNIAVX1-NEXT: vpmaddubsw %xmm2, %xmm6, %xmm2
; GFNIAVX1-NEXT: vpsllw $8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
; GFNIAVX1-NEXT: vpmullw %xmm5, %xmm6, %xmm3
; GFNIAVX1-NEXT: vpmullw %xmm5, %xmm1, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
; GFNIAVX1-NEXT: vandps %ymm4, %ymm1, %ymm1
; GFNIAVX1-NEXT: vorps %ymm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_shl_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX2-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpmullw %ymm2, %ymm0, %ymm3
; GFNIAVX2-NEXT: vpbroadcastw {{.*#+}} ymm4 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
; GFNIAVX2-NEXT: vpand %ymm4, %ymm3, %ymm3
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1,0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNIAVX2-NEXT: # ymm5 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpmaddubsw %ymm5, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpsllw $8, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpor %ymm0, %ymm3, %ymm0
; GFNIAVX2-NEXT: vpmullw %ymm2, %ymm1, %ymm2
; GFNIAVX2-NEXT: vpand %ymm4, %ymm2, %ymm2
; GFNIAVX2-NEXT: vpmaddubsw %ymm5, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpsllw $8, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpor %ymm1, %ymm2, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: constant_shl_v64i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX512VL-NEXT: # ymm2 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpmullw %ymm2, %ymm1, %ymm3
; GFNIAVX512VL-NEXT: vpmullw %ymm2, %ymm0, %ymm2
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm3, %zmm2, %zmm2
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1,0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNIAVX512VL-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpmaddubsw %ymm3, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpsllw $8, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpmaddubsw %ymm3, %ymm1, %ymm1
; GFNIAVX512VL-NEXT: vpsllw $8, %ymm1, %ymm1
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: vpternlogd {{.*#+}} zmm0 = zmm0 | (zmm2 & m32bcst)
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: constant_shl_v64i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm1 # [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX512BW-NEXT: vpmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0 # [0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1,0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1,0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1,0,2,0,8,0,32,0,128,0,64,0,16,0,4,0,1]
; GFNIAVX512BW-NEXT: vpsllw $8, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpternlogd {{.*#+}} zmm0 = zmm0 | (zmm1 & m32bcst)
; GFNIAVX512BW-NEXT: retq
%shift = shl <64 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <64 x i8> %shift
}
define <64 x i8> @constant_lshr_v64i8(<64 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_lshr_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm5 = [255,127,63,31,15,7,3,1,1,3,7,15,31,63,127,255]
; GFNISSE-NEXT: pand %xmm5, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm6 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNISSE-NEXT: gf2p8mulb %xmm6, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm1
; GFNISSE-NEXT: pand %xmm5, %xmm1
; GFNISSE-NEXT: gf2p8mulb %xmm6, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm2
; GFNISSE-NEXT: pand %xmm5, %xmm2
; GFNISSE-NEXT: gf2p8mulb %xmm6, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm3
; GFNISSE-NEXT: pand %xmm5, %xmm3
; GFNISSE-NEXT: gf2p8mulb %xmm6, %xmm3
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_lshr_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vbroadcastsd {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: vbroadcastf128 {{.*#+}} ymm3 = [255,127,63,31,15,7,3,1,1,3,7,15,31,63,127,255,255,127,63,31,15,7,3,1,1,3,7,15,31,63,127,255]
; GFNIAVX1-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX1-NEXT: vandps %ymm3, %ymm0, %ymm0
; GFNIAVX1-NEXT: vbroadcastf128 {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX1-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX1-NEXT: vgf2p8mulb %ymm4, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: vandps %ymm3, %ymm1, %ymm1
; GFNIAVX1-NEXT: vgf2p8mulb %ymm4, %ymm1, %ymm1
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_lshr_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [255,127,63,31,15,7,3,1,1,3,7,15,31,63,127,255,255,127,63,31,15,7,3,1,1,3,7,15,31,63,127,255]
; GFNIAVX2-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpand %ymm3, %ymm0, %ymm0
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1,1,2,4,8,16,32,64,128,128,64,32,16,8,4,2,1]
; GFNIAVX2-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vgf2p8mulb %ymm4, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpand %ymm3, %ymm1, %ymm1
; GFNIAVX2-NEXT: vgf2p8mulb %ymm4, %ymm1, %ymm1
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512-LABEL: constant_lshr_v64i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vpbroadcastq {{.*#+}} zmm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
; GFNIAVX512-NEXT: vgf2p8affineqb $0, %zmm1, %zmm0, %zmm0
; GFNIAVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512-NEXT: vgf2p8mulb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512-NEXT: vgf2p8affineqb $0, %zmm1, %zmm0, %zmm0
; GFNIAVX512-NEXT: retq
%shift = lshr <64 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <64 x i8> %shift
}
define <64 x i8> @constant_ashr_v64i8(<64 x i8> %a) nounwind {
; GFNISSE-LABEL: constant_ashr_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa %xmm0, %xmm6
; GFNISSE-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8],xmm0[8],xmm6[9],xmm0[9],xmm6[10],xmm0[10],xmm6[11],xmm0[11],xmm6[12],xmm0[12],xmm6[13],xmm0[13],xmm6[14],xmm0[14],xmm6[15],xmm0[15]
; GFNISSE-NEXT: psraw $8, %xmm6
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [2,4,8,16,32,64,128,256]
; GFNISSE-NEXT: pmullw %xmm4, %xmm6
; GFNISSE-NEXT: psrlw $8, %xmm6
; GFNISSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNISSE-NEXT: psraw $8, %xmm0
; GFNISSE-NEXT: movdqa {{.*#+}} xmm5 = [256,128,64,32,16,8,4,2]
; GFNISSE-NEXT: pmullw %xmm5, %xmm0
; GFNISSE-NEXT: psrlw $8, %xmm0
; GFNISSE-NEXT: packuswb %xmm6, %xmm0
; GFNISSE-NEXT: movdqa %xmm1, %xmm6
; GFNISSE-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8],xmm1[8],xmm6[9],xmm1[9],xmm6[10],xmm1[10],xmm6[11],xmm1[11],xmm6[12],xmm1[12],xmm6[13],xmm1[13],xmm6[14],xmm1[14],xmm6[15],xmm1[15]
; GFNISSE-NEXT: psraw $8, %xmm6
; GFNISSE-NEXT: pmullw %xmm4, %xmm6
; GFNISSE-NEXT: psrlw $8, %xmm6
; GFNISSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNISSE-NEXT: psraw $8, %xmm1
; GFNISSE-NEXT: pmullw %xmm5, %xmm1
; GFNISSE-NEXT: psrlw $8, %xmm1
; GFNISSE-NEXT: packuswb %xmm6, %xmm1
; GFNISSE-NEXT: movdqa %xmm2, %xmm6
; GFNISSE-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8],xmm2[8],xmm6[9],xmm2[9],xmm6[10],xmm2[10],xmm6[11],xmm2[11],xmm6[12],xmm2[12],xmm6[13],xmm2[13],xmm6[14],xmm2[14],xmm6[15],xmm2[15]
; GFNISSE-NEXT: psraw $8, %xmm6
; GFNISSE-NEXT: pmullw %xmm4, %xmm6
; GFNISSE-NEXT: psrlw $8, %xmm6
; GFNISSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNISSE-NEXT: psraw $8, %xmm2
; GFNISSE-NEXT: pmullw %xmm5, %xmm2
; GFNISSE-NEXT: psrlw $8, %xmm2
; GFNISSE-NEXT: packuswb %xmm6, %xmm2
; GFNISSE-NEXT: movdqa %xmm3, %xmm6
; GFNISSE-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8],xmm3[8],xmm6[9],xmm3[9],xmm6[10],xmm3[10],xmm6[11],xmm3[11],xmm6[12],xmm3[12],xmm6[13],xmm3[13],xmm6[14],xmm3[14],xmm6[15],xmm3[15]
; GFNISSE-NEXT: psraw $8, %xmm6
; GFNISSE-NEXT: pmullw %xmm4, %xmm6
; GFNISSE-NEXT: psrlw $8, %xmm6
; GFNISSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNISSE-NEXT: psraw $8, %xmm3
; GFNISSE-NEXT: pmullw %xmm5, %xmm3
; GFNISSE-NEXT: psrlw $8, %xmm3
; GFNISSE-NEXT: packuswb %xmm6, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: constant_ashr_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; GFNIAVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; GFNIAVX1-NEXT: vpsraw $8, %xmm2, %xmm4
; GFNIAVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [2,4,8,16,32,64,128,256]
; GFNIAVX1-NEXT: vpmullw %xmm2, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpsrlw $8, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpunpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNIAVX1-NEXT: vpsraw $8, %xmm3, %xmm5
; GFNIAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [256,128,64,32,16,8,4,2]
; GFNIAVX1-NEXT: vpmullw %xmm3, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpsrlw $8, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpackuswb %xmm4, %xmm5, %xmm4
; GFNIAVX1-NEXT: vpunpckhbw {{.*#+}} xmm5 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; GFNIAVX1-NEXT: vpsraw $8, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpmullw %xmm2, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpsrlw $8, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNIAVX1-NEXT: vpsraw $8, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpmullw %xmm3, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
; GFNIAVX1-NEXT: vpackuswb %xmm5, %xmm0, %xmm0
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0
; GFNIAVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
; GFNIAVX1-NEXT: vpunpckhbw {{.*#+}} xmm5 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; GFNIAVX1-NEXT: vpsraw $8, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpmullw %xmm2, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpsrlw $8, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNIAVX1-NEXT: vpsraw $8, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpmullw %xmm3, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpsrlw $8, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpackuswb %xmm5, %xmm4, %xmm4
; GFNIAVX1-NEXT: vpunpckhbw {{.*#+}} xmm5 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; GFNIAVX1-NEXT: vpsraw $8, %xmm5, %xmm5
; GFNIAVX1-NEXT: vpmullw %xmm2, %xmm5, %xmm2
; GFNIAVX1-NEXT: vpsrlw $8, %xmm2, %xmm2
; GFNIAVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; GFNIAVX1-NEXT: vpsraw $8, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpmullw %xmm3, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpsrlw $8, %xmm1, %xmm1
; GFNIAVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1
; GFNIAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: constant_ashr_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpunpckhbw {{.*#+}} ymm2 = ymm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
; GFNIAVX2-NEXT: vpsraw $8, %ymm2, %ymm2
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [2,4,8,16,32,64,128,256,2,4,8,16,32,64,128,256]
; GFNIAVX2-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpmullw %ymm3, %ymm2, %ymm2
; GFNIAVX2-NEXT: vpsrlw $8, %ymm2, %ymm2
; GFNIAVX2-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
; GFNIAVX2-NEXT: vpsraw $8, %ymm0, %ymm0
; GFNIAVX2-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2]
; GFNIAVX2-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vpunpckhbw {{.*#+}} ymm2 = ymm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
; GFNIAVX2-NEXT: vpsraw $8, %ymm2, %ymm2
; GFNIAVX2-NEXT: vpmullw %ymm3, %ymm2, %ymm2
; GFNIAVX2-NEXT: vpsrlw $8, %ymm2, %ymm2
; GFNIAVX2-NEXT: vpunpcklbw {{.*#+}} ymm1 = ymm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
; GFNIAVX2-NEXT: vpsraw $8, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpmullw %ymm4, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpsrlw $8, %ymm1, %ymm1
; GFNIAVX2-NEXT: vpackuswb %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512VL-LABEL: constant_ashr_v64i8:
; GFNIAVX512VL: # %bb.0:
; GFNIAVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; GFNIAVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm2 = ymm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
; GFNIAVX512VL-NEXT: vpsraw $8, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [2,4,8,16,32,64,128,256,2,4,8,16,32,64,128,256]
; GFNIAVX512VL-NEXT: # ymm3 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpmullw %ymm3, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm1 = ymm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
; GFNIAVX512VL-NEXT: vpsraw $8, %ymm1, %ymm1
; GFNIAVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2]
; GFNIAVX512VL-NEXT: # ymm4 = mem[0,1,0,1]
; GFNIAVX512VL-NEXT: vpmullw %ymm4, %ymm1, %ymm1
; GFNIAVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1
; GFNIAVX512VL-NEXT: vpackuswb %ymm2, %ymm1, %ymm1
; GFNIAVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm2 = ymm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
; GFNIAVX512VL-NEXT: vpsraw $8, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpmullw %ymm3, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2
; GFNIAVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
; GFNIAVX512VL-NEXT: vpsraw $8, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpmullw %ymm4, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
; GFNIAVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; GFNIAVX512VL-NEXT: retq
;
; GFNIAVX512BW-LABEL: constant_ashr_v64i8:
; GFNIAVX512BW: # %bb.0:
; GFNIAVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm1 = zmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63]
; GFNIAVX512BW-NEXT: vpsraw $8, %zmm1, %zmm1
; GFNIAVX512BW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm1
; GFNIAVX512BW-NEXT: vpsrlw $8, %zmm1, %zmm1
; GFNIAVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55]
; GFNIAVX512BW-NEXT: vpsraw $8, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: vpackuswb %zmm1, %zmm0, %zmm0
; GFNIAVX512BW-NEXT: retq
%shift = ashr <64 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
ret <64 x i8> %shift
}
define <64 x i8> @splatconstant_shl_v64i8(<64 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_shl_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: pmovsxdq {{.*#+}} xmm4 = [66052,66052]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatconstant_shl_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vbroadcastsd {{.*#+}} ymm2 = [4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatconstant_shl_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_shl_v64i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0 # [4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0,4,2,1,0,0,0,0,0]
; GFNIAVX512-NEXT: retq
%shift = shl <64 x i8> %a, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
ret <64 x i8> %shift
}
define <64 x i8> @splatconstant_lshr_v64i8(<64 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_lshr_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatconstant_lshr_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vbroadcastsd {{.*#+}} ymm2 = [0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatconstant_lshr_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_lshr_v64i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0 # [0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0,128]
; GFNIAVX512-NEXT: retq
%shift = lshr <64 x i8> %a, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
ret <64 x i8> %shift
}
define <64 x i8> @splatconstant_ashr_v64i8(<64 x i8> %a) nounwind {
; GFNISSE-LABEL: splatconstant_ashr_v64i8:
; GFNISSE: # %bb.0:
; GFNISSE-NEXT: movdqa {{.*#+}} xmm4 = [128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2]
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm0
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm1
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm2
; GFNISSE-NEXT: gf2p8affineqb $0, %xmm4, %xmm3
; GFNISSE-NEXT: retq
;
; GFNIAVX1-LABEL: splatconstant_ashr_v64i8:
; GFNIAVX1: # %bb.0:
; GFNIAVX1-NEXT: vbroadcastsd {{.*#+}} ymm2 = [128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2]
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX1-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX1-NEXT: retq
;
; GFNIAVX2-LABEL: splatconstant_ashr_v64i8:
; GFNIAVX2: # %bb.0:
; GFNIAVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2]
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm0, %ymm0
; GFNIAVX2-NEXT: vgf2p8affineqb $0, %ymm2, %ymm1, %ymm1
; GFNIAVX2-NEXT: retq
;
; GFNIAVX512-LABEL: splatconstant_ashr_v64i8:
; GFNIAVX512: # %bb.0:
; GFNIAVX512-NEXT: vgf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0 # [128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2,128,128,64,32,16,8,4,2]
; GFNIAVX512-NEXT: retq
%shift = ashr <64 x i8> %a, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <64 x i8> %shift
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFNIAVX: {{.*}}