derek.holloway
7502bf64a4
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27 lines
1.3 KiB
LLVM
27 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s
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; Eliminating a shuffle means we have to replace an undef operand of a horizontal op.
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define void @PR43225(ptr %p0, ptr %p1, <4 x double> %x, <4 x double> %y, <4 x double> %z) nounwind {
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; CHECK-LABEL: PR43225:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovaps (%rdi), %ymm0
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; CHECK-NEXT: vmovaps (%rsi), %ymm0
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; CHECK-NEXT: vhsubpd %ymm2, %ymm2, %ymm0
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; CHECK-NEXT: vmovapd %ymm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%t39 = load volatile <4 x double>, ptr %p0, align 32
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%shuffle11 = shufflevector <4 x double> %t39, <4 x double> %x, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
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%t40 = load volatile <4 x double>, ptr %p1, align 32
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%t41 = tail call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %shuffle11, <4 x double> %t40)
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%t42 = tail call <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double> %z, <4 x double> %t41)
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%shuffle12 = shufflevector <4 x double> %t42, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
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store volatile <4 x double> %shuffle12, ptr %p0, align 32
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ret void
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}
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declare <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double>, <4 x double>)
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declare <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double>, <4 x double>)
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