derek.holloway
7502bf64a4
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98 lines
4.3 KiB
LLVM
98 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; avx10.x-512 is just avx10.x -- 512 is kept for compatibility purposes.
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.1-512 2>&1 | FileCheck --check-prefixes=CHECK-AVX10_1 %s
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2-512 2>&1 | FileCheck --check-prefixes=CHECK-AVX10_2 %s
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; CHECK-AVX10_1-NOT: is not recognizable
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; CHECK-AVX10_2-NOT: is not recognizable
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define <32 x bfloat> @foo_avx10.1(<16 x float> %a, <16 x float> %b) {
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; CHECK-AVX10_1-LABEL: foo_avx10.1:
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; CHECK-AVX10_1: # %bb.0:
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; CHECK-AVX10_1-NEXT: vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0
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; CHECK-AVX10_1-NEXT: retq
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;
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; CHECK-AVX10_2-LABEL: foo_avx10.1:
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; CHECK-AVX10_2: # %bb.0:
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; CHECK-AVX10_2-NEXT: vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0
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; CHECK-AVX10_2-NEXT: retq
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%ret = call <32 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %a, <16 x float> %b)
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ret <32 x bfloat> %ret
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}
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define <8 x i32> @foo_avx10.2(<8 x double> %f) {
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; CHECK-AVX10_1-LABEL: foo_avx10.2:
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; CHECK-AVX10_1: # %bb.0:
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; CHECK-AVX10_1-NEXT: vextractf32x4 $2, %zmm0, %xmm1
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; CHECK-AVX10_1-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]
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; CHECK-AVX10_1-NEXT: vmovsd {{.*#+}} xmm3 = [-2.147483648E+9,0.0E+0]
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; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm2, %xmm4
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; CHECK-AVX10_1-NEXT: vmovsd {{.*#+}} xmm5 = [2.147483647E+9,0.0E+0]
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; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm4
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; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx
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; CHECK-AVX10_1-NEXT: xorl %eax, %eax
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; CHECK-AVX10_1-NEXT: vucomisd %xmm2, %xmm2
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; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx
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; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm1, %xmm2
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; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm2, %xmm2
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; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm2, %edx
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; CHECK-AVX10_1-NEXT: vucomisd %xmm1, %xmm1
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; CHECK-AVX10_1-NEXT: cmovpl %eax, %edx
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; CHECK-AVX10_1-NEXT: vmovd %edx, %xmm1
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; CHECK-AVX10_1-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1
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; CHECK-AVX10_1-NEXT: vextractf32x4 $3, %zmm0, %xmm2
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; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm2, %xmm4
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; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm4
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; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx
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; CHECK-AVX10_1-NEXT: vucomisd %xmm2, %xmm2
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; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx
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; CHECK-AVX10_1-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1
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; CHECK-AVX10_1-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]
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; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm2, %xmm4
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; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm4
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; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx
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; CHECK-AVX10_1-NEXT: vucomisd %xmm2, %xmm2
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; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx
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; CHECK-AVX10_1-NEXT: vpinsrd $3, %ecx, %xmm1, %xmm1
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; CHECK-AVX10_1-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]
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; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm2, %xmm4
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; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm4
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; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx
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; CHECK-AVX10_1-NEXT: vucomisd %xmm2, %xmm2
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; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx
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; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm0, %xmm2
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; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm2, %xmm2
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; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm2, %edx
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; CHECK-AVX10_1-NEXT: vucomisd %xmm0, %xmm0
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; CHECK-AVX10_1-NEXT: cmovpl %eax, %edx
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; CHECK-AVX10_1-NEXT: vmovd %edx, %xmm2
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; CHECK-AVX10_1-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
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; CHECK-AVX10_1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm0, %xmm4
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; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm4
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; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx
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; CHECK-AVX10_1-NEXT: vucomisd %xmm0, %xmm0
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; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx
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; CHECK-AVX10_1-NEXT: vpinsrd $2, %ecx, %xmm2, %xmm2
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; CHECK-AVX10_1-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm0, %xmm3
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; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm3, %xmm3
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; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm3, %ecx
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; CHECK-AVX10_1-NEXT: vucomisd %xmm0, %xmm0
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; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx
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; CHECK-AVX10_1-NEXT: vpinsrd $3, %ecx, %xmm2, %xmm0
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; CHECK-AVX10_1-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; CHECK-AVX10_1-NEXT: retq
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;
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; CHECK-AVX10_2-LABEL: foo_avx10.2:
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; CHECK-AVX10_2: # %bb.0:
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; CHECK-AVX10_2-NEXT: vcvttpd2dqs %zmm0, %ymm0
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; CHECK-AVX10_2-NEXT: retq
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%x = call <8 x i32> @llvm.fptosi.sat.v8i32.v8f64(<8 x double> %f)
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ret <8 x i32> %x
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}
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