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TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

50 lines
1.7 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: opt -passes=mergeicmps,expand-memcmp -mtriple=i686-unknown-unknown -S < %s | llc -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
; RUN: opt -passes=mergeicmps,expand-memcmp -mtriple=x86_64-unknown-unknown -S < %s | llc -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
; This tests interaction between MergeICmp and ExpandMemCmp.
%"struct.std::pair" = type { i32, i32 }
define zeroext i1 @opeq1(
; X86-LABEL: opeq1:
; X86: # %bb.0: # %"entry+land.rhs.i"
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %edx
; X86-NEXT: movl 4(%ecx), %ecx
; X86-NEXT: xorl (%eax), %edx
; X86-NEXT: xorl 4(%eax), %ecx
; X86-NEXT: orl %edx, %ecx
; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: opeq1:
; X64: # %bb.0: # %"entry+land.rhs.i"
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: cmpq (%rsi), %rax
; X64-NEXT: sete %al
; X64-NEXT: retq
ptr nocapture readonly dereferenceable(8) %a,
ptr nocapture readonly dereferenceable(8) %b) local_unnamed_addr nofree nosync {
entry:
%0 = load i32, ptr %a, align 4
%1 = load i32, ptr %b, align 4
%cmp.i = icmp eq i32 %0, %1
br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit
land.rhs.i:
%second.i = getelementptr inbounds %"struct.std::pair", ptr %a, i64 0, i32 1
%2 = load i32, ptr %second.i, align 4
%second2.i = getelementptr inbounds %"struct.std::pair", ptr %b, i64 0, i32 1
%3 = load i32, ptr %second2.i, align 4
%cmp3.i = icmp eq i32 %2, %3
br label %opeq1.exit
opeq1.exit:
%4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]
ret i1 %4
}