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70 lines
2.4 KiB
LLVM
70 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
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;
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; When a MULX operand already lives in RDX (the implicit source register) at
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; function entry, no register-copy preamble should be emitted before the MULX.
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; In SysV x86-64 ABI the 3rd integer argument arrives in %rdx.
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; Pure 64x64->128 multiply: arg 'a' is the 3rd argument, arriving in %rdx.
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; The mul i128 node is emitted with operands in (b, a) order (as clang does);
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define void @mul64_u128_a_in_rdx(ptr %hi, ptr %lo, i64 %a, i64 %b) {
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; CHECK-LABEL: mul64_u128_a_in_rdx:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulxq %rcx, %rcx, %rax
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; CHECK-NEXT: movq %rcx, (%rsi)
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: retq
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%za = zext i64 %a to i128
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%zb = zext i64 %b to i128
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%r = mul nuw i128 %zb, %za
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%lo_val = trunc i128 %r to i64
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store i64 %lo_val, ptr %lo
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%hi_shr = lshr i128 %r, 64
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%hi_val = trunc nuw i128 %hi_shr to i64
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store i64 %hi_val, ptr %hi
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ret void
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}
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; Same multiply with operands in natural (a, b) order.
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define void @mul64_u128_a_in_rdx_natural_order(ptr %hi, ptr %lo, i64 %a, i64 %b) {
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; CHECK-LABEL: mul64_u128_a_in_rdx_natural_order:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulxq %rcx, %rcx, %rax
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; CHECK-NEXT: movq %rcx, (%rsi)
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: retq
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%za = zext i64 %a to i128
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%zb = zext i64 %b to i128
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%r = mul nuw i128 %za, %zb
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%lo_val = trunc i128 %r to i64
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store i64 %lo_val, ptr %lo
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%hi_shr = lshr i128 %r, 64
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%hi_val = trunc nuw i128 %hi_shr to i64
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store i64 %hi_val, ptr %hi
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ret void
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}
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; Multiply-add: hi:lo = a*b + c. 'a' is the 3rd arg in %rdx, 'c' is in %r8.
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define void @muladd64_a_in_rdx(ptr %hi, ptr %lo, i64 %a, i64 %b, i64 %c) {
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; CHECK-LABEL: muladd64_a_in_rdx:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulxq %rcx, %rax, %rcx
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; CHECK-NEXT: addq %r8, %rax
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; CHECK-NEXT: adcq $0, %rcx
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; CHECK-NEXT: movq %rax, (%rsi)
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; CHECK-NEXT: movq %rcx, (%rdi)
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; CHECK-NEXT: retq
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%za = zext i64 %a to i128
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%zb = zext i64 %b to i128
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%r = mul nuw i128 %zb, %za
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%zc = zext i64 %c to i128
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%r2 = add nuw i128 %r, %zc
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%lo_val = trunc i128 %r2 to i64
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store i64 %lo_val, ptr %lo
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%hi_shr = lshr i128 %r2, 64
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%hi_val = trunc nuw i128 %hi_shr to i64
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store i64 %hi_val, ptr %hi
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ret void
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}
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