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TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/mulx64-no-implicit-copy.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

70 lines
2.4 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
;
; When a MULX operand already lives in RDX (the implicit source register) at
; function entry, no register-copy preamble should be emitted before the MULX.
; In SysV x86-64 ABI the 3rd integer argument arrives in %rdx.
; Pure 64x64->128 multiply: arg 'a' is the 3rd argument, arriving in %rdx.
; The mul i128 node is emitted with operands in (b, a) order (as clang does);
define void @mul64_u128_a_in_rdx(ptr %hi, ptr %lo, i64 %a, i64 %b) {
; CHECK-LABEL: mul64_u128_a_in_rdx:
; CHECK: # %bb.0:
; CHECK-NEXT: mulxq %rcx, %rcx, %rax
; CHECK-NEXT: movq %rcx, (%rsi)
; CHECK-NEXT: movq %rax, (%rdi)
; CHECK-NEXT: retq
%za = zext i64 %a to i128
%zb = zext i64 %b to i128
%r = mul nuw i128 %zb, %za
%lo_val = trunc i128 %r to i64
store i64 %lo_val, ptr %lo
%hi_shr = lshr i128 %r, 64
%hi_val = trunc nuw i128 %hi_shr to i64
store i64 %hi_val, ptr %hi
ret void
}
; Same multiply with operands in natural (a, b) order.
define void @mul64_u128_a_in_rdx_natural_order(ptr %hi, ptr %lo, i64 %a, i64 %b) {
; CHECK-LABEL: mul64_u128_a_in_rdx_natural_order:
; CHECK: # %bb.0:
; CHECK-NEXT: mulxq %rcx, %rcx, %rax
; CHECK-NEXT: movq %rcx, (%rsi)
; CHECK-NEXT: movq %rax, (%rdi)
; CHECK-NEXT: retq
%za = zext i64 %a to i128
%zb = zext i64 %b to i128
%r = mul nuw i128 %za, %zb
%lo_val = trunc i128 %r to i64
store i64 %lo_val, ptr %lo
%hi_shr = lshr i128 %r, 64
%hi_val = trunc nuw i128 %hi_shr to i64
store i64 %hi_val, ptr %hi
ret void
}
; Multiply-add: hi:lo = a*b + c. 'a' is the 3rd arg in %rdx, 'c' is in %r8.
define void @muladd64_a_in_rdx(ptr %hi, ptr %lo, i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: muladd64_a_in_rdx:
; CHECK: # %bb.0:
; CHECK-NEXT: mulxq %rcx, %rax, %rcx
; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: adcq $0, %rcx
; CHECK-NEXT: movq %rax, (%rsi)
; CHECK-NEXT: movq %rcx, (%rdi)
; CHECK-NEXT: retq
%za = zext i64 %a to i128
%zb = zext i64 %b to i128
%r = mul nuw i128 %zb, %za
%zc = zext i64 %c to i128
%r2 = add nuw i128 %r, %zc
%lo_val = trunc i128 %r2 to i64
store i64 %lo_val, ptr %lo
%hi_shr = lshr i128 %r2, 64
%hi_val = trunc nuw i128 %hi_shr to i64
store i64 %hi_val, ptr %hi
ret void
}