derek.holloway
7502bf64a4
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904 lines
32 KiB
YAML
904 lines
32 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
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# RUN: llc -mtriple=x86_64-- -mcpu=skylake-avx512 -run-pass=peephole-opt %s -o - | FileCheck %s
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---
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name: test_valignd_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk4wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128x }
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- { id: 4, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_valignd_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVDQA32Z128rmkz:%[0-9]+]]:vr128x = VMOVDQA32Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VALIGNDZ128rrik:%[0-9]+]]:vr128 = VALIGNDZ128rrik [[AVX512_128_SET0_]], [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQA32Z128rmkz]], 1
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; CHECK-NEXT: $xmm0 = COPY [[VALIGNDZ128rrik]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk4wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVDQA32Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128x = AVX512_128_SET0
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%4:vr128 = VALIGNDZ128rrik %1, %0, %3, %2, 1
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$xmm0 = COPY %4
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RET 0, $xmm0
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...
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---
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name: test_vpalignr_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk16wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128x }
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- { id: 4, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vpalignr_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk16wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVDQU8Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU8Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VPALIGNRZ128rrikz:%[0-9]+]]:vr128 = VPALIGNRZ128rrikz [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQU8Z128rmkz]], 4
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; CHECK-NEXT: $xmm0 = COPY [[VPALIGNRZ128rrikz]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk16wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVDQU8Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128x = AVX512_128_SET0
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%4:vr128 = VPALIGNRZ128rrikz %0, %3, %2, 4
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$xmm0 = COPY %4
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RET 0, $xmm0
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...
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---
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name: test_vbroadcastss_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk4wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vbroadcastss_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVAPSZ128rmkz:%[0-9]+]]:vr128x = VMOVAPSZ128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[VBROADCASTSSZ128rrk:%[0-9]+]]:vr128 = VBROADCASTSSZ128rrk [[AVX512_128_SET0_]], [[COPY]], [[VMOVAPSZ128rmkz]]
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; CHECK-NEXT: $xmm0 = COPY [[VBROADCASTSSZ128rrk]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk4wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVAPSZ128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128 = VBROADCASTSSZ128rrk %1, %0, %2
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$xmm0 = COPY %3
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RET 0, $xmm0
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...
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---
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name: test_vmovddup_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk2wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vmovddup_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk2wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVAPDZ128rmkz:%[0-9]+]]:vr128x = VMOVAPDZ128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[VMOVDDUPZ128rrkz:%[0-9]+]]:vr128 = VMOVDDUPZ128rrkz [[COPY]], [[VMOVAPDZ128rmkz]]
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; CHECK-NEXT: $xmm0 = COPY [[VMOVDDUPZ128rrkz]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk2wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVAPDZ128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128 = VMOVDDUPZ128rrkz %0, %2
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$xmm0 = COPY %3
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RET 0, $xmm0
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...
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---
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name: test_vmovshdup_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk4wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vmovshdup_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVAPSZ128rmkz:%[0-9]+]]:vr128x = VMOVAPSZ128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[VMOVSHDUPZ128rrkz:%[0-9]+]]:vr128 = VMOVSHDUPZ128rrkz [[COPY]], [[VMOVAPSZ128rmkz]]
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; CHECK-NEXT: $xmm0 = COPY [[VMOVSHDUPZ128rrkz]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk4wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVAPSZ128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128 = VMOVSHDUPZ128rrkz %0, %2
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$xmm0 = COPY %3
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RET 0, $xmm0
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...
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---
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name: test_vpbroadcastd_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk4wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vpbroadcastd_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVDQA32Z128rmkz:%[0-9]+]]:vr128x = VMOVDQA32Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[VPBROADCASTDZ128rrkz:%[0-9]+]]:vr128 = VPBROADCASTDZ128rrkz [[COPY]], [[VMOVDQA32Z128rmkz]]
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; CHECK-NEXT: $xmm0 = COPY [[VPBROADCASTDZ128rrkz]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk4wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVDQA32Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128 = VPBROADCASTDZ128rrkz %0, %2
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$xmm0 = COPY %3
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RET 0, $xmm0
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...
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---
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name: test_vdbpsadbw_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk8wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128x }
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- { id: 4, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vdbpsadbw_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVDQU16Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU16Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VDBPSADBWZ128rrikz:%[0-9]+]]:vr128 = VDBPSADBWZ128rrikz [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQU16Z128rmkz]], 0
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; CHECK-NEXT: $xmm0 = COPY [[VDBPSADBWZ128rrikz]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk8wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVDQU16Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128x = AVX512_128_SET0
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%4:vr128 = VDBPSADBWZ128rrikz %0, %3, %2, 0
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$xmm0 = COPY %4
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RET 0, $xmm0
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...
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---
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name: test_vgf2p8affineqb_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk16wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128x }
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- { id: 4, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vgf2p8affineqb_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk16wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVDQU8Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU8Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VGF2P8AFFINEQBZ128rrikz:%[0-9]+]]:vr128 = VGF2P8AFFINEQBZ128rrikz [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQU8Z128rmkz]], 0
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; CHECK-NEXT: $xmm0 = COPY [[VGF2P8AFFINEQBZ128rrikz]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk16wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVDQU8Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128x = AVX512_128_SET0
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%4:vr128 = VGF2P8AFFINEQBZ128rrikz %0, %3, %2, 0
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$xmm0 = COPY %4
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RET 0, $xmm0
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...
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---
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name: test_vmpsadbw_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk8wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128x }
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- { id: 4, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vmpsadbw_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMOVDQU16Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU16Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
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; CHECK-NEXT: [[VMPSADBWZ128rrikz:%[0-9]+]]:vr128 = VMPSADBWZ128rrikz [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQU16Z128rmkz]], 0
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; CHECK-NEXT: $xmm0 = COPY [[VMPSADBWZ128rrikz]]
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; CHECK-NEXT: RET 0, $xmm0
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%0:vk8wm = COPY $k1
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%1:vr128x = AVX512_128_SET0
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%2:vr128x = VMOVDQU16Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
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%3:vr128x = AVX512_128_SET0
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%4:vr128 = VMPSADBWZ128rrikz %0, %3, %2, 0
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$xmm0 = COPY %4
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RET 0, $xmm0
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...
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---
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name: test_vpconflictd_same_mask
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vk4wm }
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- { id: 1, class: vr128x }
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- { id: 2, class: vr128x }
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- { id: 3, class: vr128 }
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liveins:
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- { reg: '$rdi' }
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- { reg: '$k1' }
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body: |
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bb.0:
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liveins: $rdi, $k1
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; CHECK-LABEL: name: test_vpconflictd_same_mask
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; CHECK: liveins: $rdi, $k1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
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; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVDQA32Z128rmkz:%[0-9]+]]:vr128x = VMOVDQA32Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VPCONFLICTDZ128rrk:%[0-9]+]]:vr128 = VPCONFLICTDZ128rrk [[AVX512_128_SET0_]], [[COPY]], [[VMOVDQA32Z128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPCONFLICTDZ128rrk]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVDQA32Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128 = VPCONFLICTDZ128rrk %1, %0, %2
|
|
$xmm0 = COPY %3
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpmultishiftqb_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk16wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128x }
|
|
- { id: 4, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpmultishiftqb_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk16wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVDQU8Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU8Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VPMULTISHIFTQBZ128rrkz:%[0-9]+]]:vr128 = VPMULTISHIFTQBZ128rrkz [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQU8Z128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPMULTISHIFTQBZ128rrkz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk16wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVDQU8Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128x = AVX512_128_SET0
|
|
%4:vr128 = VPMULTISHIFTQBZ128rrkz %0, %3, %2
|
|
$xmm0 = COPY %4
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vexpandps_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk4wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vexpandps_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVAPSZ128rmkz:%[0-9]+]]:vr128x = VMOVAPSZ128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VEXPANDPSZ128rrk:%[0-9]+]]:vr128 = VEXPANDPSZ128rrk [[AVX512_128_SET0_]], [[COPY]], [[VMOVAPSZ128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VEXPANDPSZ128rrk]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVAPSZ128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128 = VEXPANDPSZ128rrk %1, %0, %2
|
|
$xmm0 = COPY %3
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vinserti32x4_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk4wm }
|
|
- { id: 1, class: vr256x }
|
|
- { id: 2, class: vr256x }
|
|
- { id: 3, class: vr128x }
|
|
- { id: 4, class: vr256 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vinserti32x4_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_256_SET0_:%[0-9]+]]:vr256x = AVX512_256_SET0
|
|
; CHECK-NEXT: [[AVX512_256_SET0_1:%[0-9]+]]:vr256x = AVX512_256_SET0
|
|
; CHECK-NEXT: [[VMOVDQA32Z128rmkz:%[0-9]+]]:vr128x = VMOVDQA32Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VINSERTI32X4Z256rrikz:%[0-9]+]]:vr256 = VINSERTI32X4Z256rrikz [[COPY]], [[AVX512_256_SET0_1]], [[VMOVDQA32Z128rmkz]], 1
|
|
; CHECK-NEXT: $ymm0 = COPY [[VINSERTI32X4Z256rrikz]]
|
|
; CHECK-NEXT: RET 0, $ymm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr256x = AVX512_256_SET0
|
|
%2:vr256x = AVX512_256_SET0
|
|
%3:vr128x = VMOVDQA32Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%4:vr256 = VINSERTI32X4Z256rrikz %0, %2, %3, 1
|
|
$ymm0 = COPY %4
|
|
RET 0, $ymm0
|
|
...
|
|
---
|
|
name: test_vpackssdw_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk8wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128x }
|
|
- { id: 4, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpackssdw_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVDQU16Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU16Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VPACKSSDWZ128rrk:%[0-9]+]]:vr128 = VPACKSSDWZ128rrk [[AVX512_128_SET0_]], [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQU16Z128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPACKSSDWZ128rrk]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk8wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVDQU16Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128x = AVX512_128_SET0
|
|
%4:vr128 = VPACKSSDWZ128rrk %1, %0, %3, %2
|
|
$xmm0 = COPY %4
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpermd_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk8wm }
|
|
- { id: 1, class: vr256x }
|
|
- { id: 2, class: vr256x }
|
|
- { id: 3, class: vr256x }
|
|
- { id: 4, class: vr256 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpermd_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_256_SET0_:%[0-9]+]]:vr256x = AVX512_256_SET0
|
|
; CHECK-NEXT: [[VMOVDQA32Z256rmkz:%[0-9]+]]:vr256x = VMOVDQA32Z256rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s256))
|
|
; CHECK-NEXT: [[AVX512_256_SET0_1:%[0-9]+]]:vr256x = AVX512_256_SET0
|
|
; CHECK-NEXT: [[VPERMDZ256rrk:%[0-9]+]]:vr256 = VPERMDZ256rrk [[AVX512_256_SET0_]], [[COPY]], [[AVX512_256_SET0_1]], [[VMOVDQA32Z256rmkz]]
|
|
; CHECK-NEXT: $ymm0 = COPY [[VPERMDZ256rrk]]
|
|
; CHECK-NEXT: RET 0, $ymm0
|
|
%0:vk8wm = COPY $k1
|
|
%1:vr256x = AVX512_256_SET0
|
|
%2:vr256x = VMOVDQA32Z256rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s256))
|
|
%3:vr256x = AVX512_256_SET0
|
|
%4:vr256 = VPERMDZ256rrk %1, %0, %3, %2
|
|
$ymm0 = COPY %4
|
|
RET 0, $ymm0
|
|
...
|
|
---
|
|
name: test_vpermi2d_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk4wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128x }
|
|
- { id: 4, class: vr128x }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpermi2d_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVDQA32Z128rmkz:%[0-9]+]]:vr128x = VMOVDQA32Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VPERMI2DZ128rrkz:%[0-9]+]]:vr128x = VPERMI2DZ128rrkz [[AVX512_128_SET0_]], [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQA32Z128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPERMI2DZ128rrkz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVDQA32Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128x = AVX512_128_SET0
|
|
%4:vr128x = VPERMI2DZ128rrkz %1, %0, %3, %2
|
|
$xmm0 = COPY %4
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpermilps_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk4wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpermilps_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
|
|
; CHECK-NEXT: [[VMOVAPSZ128rmkz:%[0-9]+]]:vr128x = VMOVAPSZ128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VPERMILPSZ128rikz:%[0-9]+]]:vr128 = VPERMILPSZ128rikz [[COPY]], [[VMOVAPSZ128rmkz]], 27
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPERMILPSZ128rikz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr128x = VMOVAPSZ128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%2:vr128 = VPERMILPSZ128rikz %0, %1, 27
|
|
$xmm0 = COPY %2
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpermps_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk8wm }
|
|
- { id: 1, class: vr256x }
|
|
- { id: 2, class: vr256x }
|
|
- { id: 3, class: vr256x }
|
|
- { id: 4, class: vr256 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpermps_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_256_SET0_:%[0-9]+]]:vr256x = AVX512_256_SET0
|
|
; CHECK-NEXT: [[VMOVAPSZ256rmkz:%[0-9]+]]:vr256x = VMOVAPSZ256rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s256))
|
|
; CHECK-NEXT: [[AVX512_256_SET0_1:%[0-9]+]]:vr256x = AVX512_256_SET0
|
|
; CHECK-NEXT: [[VPERMPSZ256rrkz:%[0-9]+]]:vr256 = VPERMPSZ256rrkz [[COPY]], [[AVX512_256_SET0_1]], [[VMOVAPSZ256rmkz]]
|
|
; CHECK-NEXT: $ymm0 = COPY [[VPERMPSZ256rrkz]]
|
|
; CHECK-NEXT: RET 0, $ymm0
|
|
%0:vk8wm = COPY $k1
|
|
%1:vr256x = AVX512_256_SET0
|
|
%2:vr256x = VMOVAPSZ256rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s256))
|
|
%3:vr256x = AVX512_256_SET0
|
|
%4:vr256 = VPERMPSZ256rrkz %0, %3, %2
|
|
$ymm0 = COPY %4
|
|
RET 0, $ymm0
|
|
...
|
|
---
|
|
name: test_vpermt2d_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk4wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128x }
|
|
- { id: 4, class: vr128x }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpermt2d_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVDQA32Z128rmkz:%[0-9]+]]:vr128x = VMOVDQA32Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VPERMT2DZ128rrkz:%[0-9]+]]:vr128x = VPERMT2DZ128rrkz [[AVX512_128_SET0_]], [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQA32Z128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPERMT2DZ128rrkz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVDQA32Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128x = AVX512_128_SET0
|
|
%4:vr128x = VPERMT2DZ128rrkz %1, %0, %3, %2
|
|
$xmm0 = COPY %4
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpermw_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk8wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128x }
|
|
- { id: 4, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpermw_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVDQU16Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU16Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[AVX512_128_SET0_1:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VPERMWZ128rrkz:%[0-9]+]]:vr128 = VPERMWZ128rrkz [[COPY]], [[AVX512_128_SET0_1]], [[VMOVDQU16Z128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPERMWZ128rrkz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk8wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVDQU16Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128x = AVX512_128_SET0
|
|
%4:vr128 = VPERMWZ128rrkz %0, %3, %2
|
|
$xmm0 = COPY %4
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpshufd_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk4wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpshufd_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
|
|
; CHECK-NEXT: [[VMOVDQA32Z128rmkz:%[0-9]+]]:vr128x = VMOVDQA32Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VPSHUFDZ128rikz:%[0-9]+]]:vr128 = VPSHUFDZ128rikz [[COPY]], [[VMOVDQA32Z128rmkz]], 27
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPSHUFDZ128rikz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr128x = VMOVDQA32Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%2:vr128 = VPSHUFDZ128rikz %0, %1, 27
|
|
$xmm0 = COPY %2
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpshufhw_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk8wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpshufhw_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
|
|
; CHECK-NEXT: [[VMOVDQU16Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU16Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VPSHUFHWZ128rikz:%[0-9]+]]:vr128 = VPSHUFHWZ128rikz [[COPY]], [[VMOVDQU16Z128rmkz]], 27
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPSHUFHWZ128rikz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk8wm = COPY $k1
|
|
%1:vr128x = VMOVDQU16Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%2:vr128 = VPSHUFHWZ128rikz %0, %1, 27
|
|
$xmm0 = COPY %2
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpshuflw_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk8wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpshuflw_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
|
|
; CHECK-NEXT: [[VMOVDQU16Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU16Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VPSHUFLWZ128rikz:%[0-9]+]]:vr128 = VPSHUFLWZ128rikz [[COPY]], [[VMOVDQU16Z128rmkz]], 27
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPSHUFLWZ128rikz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk8wm = COPY $k1
|
|
%1:vr128x = VMOVDQU16Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%2:vr128 = VPSHUFLWZ128rikz %0, %1, 27
|
|
$xmm0 = COPY %2
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vshuff32x4_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk8wm }
|
|
- { id: 1, class: vr256x }
|
|
- { id: 2, class: vr256x }
|
|
- { id: 3, class: vr256x }
|
|
- { id: 4, class: vr256 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vshuff32x4_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk8wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_256_SET0_:%[0-9]+]]:vr256x = AVX512_256_SET0
|
|
; CHECK-NEXT: [[VMOVAPSZ256rmkz:%[0-9]+]]:vr256x = VMOVAPSZ256rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s256))
|
|
; CHECK-NEXT: [[AVX512_256_SET0_1:%[0-9]+]]:vr256x = AVX512_256_SET0
|
|
; CHECK-NEXT: [[VSHUFF32X4Z256rrikz:%[0-9]+]]:vr256 = VSHUFF32X4Z256rrikz [[COPY]], [[AVX512_256_SET0_1]], [[VMOVAPSZ256rmkz]], 2
|
|
; CHECK-NEXT: $ymm0 = COPY [[VSHUFF32X4Z256rrikz]]
|
|
; CHECK-NEXT: RET 0, $ymm0
|
|
%0:vk8wm = COPY $k1
|
|
%1:vr256x = AVX512_256_SET0
|
|
%2:vr256x = VMOVAPSZ256rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s256))
|
|
%3:vr256x = AVX512_256_SET0
|
|
%4:vr256 = VSHUFF32X4Z256rrikz %0, %3, %2, 2
|
|
$ymm0 = COPY %4
|
|
RET 0, $ymm0
|
|
...
|
|
---
|
|
name: test_vshufpd_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk2wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vshufpd_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk2wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVAPDZ128rmkz:%[0-9]+]]:vr128x = VMOVAPDZ128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VSHUFPDZ128rrikz:%[0-9]+]]:vr128 = VSHUFPDZ128rrikz [[COPY]], [[AVX512_128_SET0_]], [[VMOVAPDZ128rmkz]], 1
|
|
; CHECK-NEXT: $xmm0 = COPY [[VSHUFPDZ128rrikz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk2wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVAPDZ128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128 = VSHUFPDZ128rrikz %0, %1, %2, 1
|
|
$xmm0 = COPY %3
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vshufps_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk4wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vshufps_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVAPSZ128rmkz:%[0-9]+]]:vr128x = VMOVAPSZ128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VSHUFPSZ128rrikz:%[0-9]+]]:vr128 = VSHUFPSZ128rrikz [[COPY]], [[AVX512_128_SET0_]], [[VMOVAPSZ128rmkz]], 68
|
|
; CHECK-NEXT: $xmm0 = COPY [[VSHUFPSZ128rrikz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVAPSZ128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128 = VSHUFPSZ128rrikz %0, %1, %2, 68
|
|
$xmm0 = COPY %3
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpunpckhbw_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk16wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpunpckhbw_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk16wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVDQU8Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU8Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VPUNPCKHBWZ128rrkz:%[0-9]+]]:vr128 = VPUNPCKHBWZ128rrkz [[COPY]], [[AVX512_128_SET0_]], [[VMOVDQU8Z128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPUNPCKHBWZ128rrkz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk16wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVDQU8Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128 = VPUNPCKHBWZ128rrkz %0, %1, %2
|
|
$xmm0 = COPY %3
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vpunpcklbw_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk16wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vpunpcklbw_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk16wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVDQU8Z128rmkz:%[0-9]+]]:vr128x = VMOVDQU8Z128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VPUNPCKLBWZ128rrkz:%[0-9]+]]:vr128 = VPUNPCKLBWZ128rrkz [[COPY]], [[AVX512_128_SET0_]], [[VMOVDQU8Z128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VPUNPCKLBWZ128rrkz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk16wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVDQU8Z128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128 = VPUNPCKLBWZ128rrkz %0, %1, %2
|
|
$xmm0 = COPY %3
|
|
RET 0, $xmm0
|
|
...
|
|
---
|
|
name: test_vunpcklps_same_mask
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vk4wm }
|
|
- { id: 1, class: vr128x }
|
|
- { id: 2, class: vr128x }
|
|
- { id: 3, class: vr128 }
|
|
liveins:
|
|
- { reg: '$rdi' }
|
|
- { reg: '$k1' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $rdi, $k1
|
|
; CHECK-LABEL: name: test_vunpcklps_same_mask
|
|
; CHECK: liveins: $rdi, $k1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:vk4wm = COPY $k1
|
|
; CHECK-NEXT: [[AVX512_128_SET0_:%[0-9]+]]:vr128x = AVX512_128_SET0
|
|
; CHECK-NEXT: [[VMOVAPSZ128rmkz:%[0-9]+]]:vr128x = VMOVAPSZ128rmkz [[COPY]], $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
; CHECK-NEXT: [[VUNPCKLPSZ128rrkz:%[0-9]+]]:vr128 = VUNPCKLPSZ128rrkz [[COPY]], [[AVX512_128_SET0_]], [[VMOVAPSZ128rmkz]]
|
|
; CHECK-NEXT: $xmm0 = COPY [[VUNPCKLPSZ128rrkz]]
|
|
; CHECK-NEXT: RET 0, $xmm0
|
|
%0:vk4wm = COPY $k1
|
|
%1:vr128x = AVX512_128_SET0
|
|
%2:vr128x = VMOVAPSZ128rmkz %0, $rdi, 1, $noreg, 0, $noreg :: (load (s128))
|
|
%3:vr128 = VUNPCKLPSZ128rrkz %0, %1, %2
|
|
$xmm0 = COPY %3
|
|
RET 0, $xmm0
|
|
...
|