derek.holloway
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28 lines
1.0 KiB
YAML
28 lines
1.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=x86_64-- -mattr=+avx2 -run-pass=peephole-opt -o - %s | FileCheck %s
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# When trying to coalesce the operand of VMOVSDto64rr, a query would
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# be made with the same register class but the source has a
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# subregister and the result does not.
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---
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name: uncoalescable_copy_queries_same_regclass_with_only_one_subreg
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tracksRegLiveness: true
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isSSA: true
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body: |
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bb.0:
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liveins: $rax
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; CHECK-LABEL: name: uncoalescable_copy_queries_same_regclass_with_only_one_subreg
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; CHECK: liveins: $rax
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rax
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:vr128 = COPY [[COPY]].sub_32bit
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; CHECK-NEXT: [[VMOVSDto64rr:%[0-9]+]]:gr64 = VMOVSDto64rr [[COPY1]]
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; CHECK-NEXT: RET 0, implicit [[VMOVSDto64rr]]
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%0:gr64 = COPY $rax
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%1:vr128 = COPY %0.sub_32bit
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%2:gr64 = VMOVSDto64rr %1
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RET 0, implicit %2
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...
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