derek.holloway
7502bf64a4
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45 lines
1.7 KiB
LLVM
45 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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;
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; PR30298: Check if the target doesn't have SSE2, compiler will not crash
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; or generate incorrect code because of vector mul width shrinking optimization.
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;
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; RUN: llc -mtriple=i386-pc-linux-gnu -mattr=+sse < %s | FileCheck %s
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@c = external dso_local global ptr, align 8
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define void @mul_2xi8(ptr nocapture readonly %a, ptr nocapture readonly %b, i64 %index) nounwind {
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; CHECK-LABEL: mul_2xi8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movl c, %esi
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; CHECK-NEXT: movzbl 1(%edx,%ecx), %edi
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; CHECK-NEXT: movzbl (%edx,%ecx), %edx
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; CHECK-NEXT: movzbl 1(%eax,%ecx), %ebx
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; CHECK-NEXT: imull %edi, %ebx
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; CHECK-NEXT: movzbl (%eax,%ecx), %eax
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; CHECK-NEXT: imull %edx, %eax
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; CHECK-NEXT: movl %ebx, 4(%esi,%ecx,4)
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; CHECK-NEXT: movl %eax, (%esi,%ecx,4)
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: popl %ebx
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; CHECK-NEXT: retl
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entry:
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%pre = load ptr, ptr @c
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%tmp6 = getelementptr inbounds i8, ptr %a, i64 %index
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%wide.load = load <2 x i8>, ptr %tmp6, align 1
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%tmp8 = zext <2 x i8> %wide.load to <2 x i32>
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%tmp10 = getelementptr inbounds i8, ptr %b, i64 %index
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%wide.load17 = load <2 x i8>, ptr %tmp10, align 1
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%tmp12 = zext <2 x i8> %wide.load17 to <2 x i32>
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%tmp13 = mul nuw nsw <2 x i32> %tmp12, %tmp8
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%tmp14 = getelementptr inbounds i32, ptr %pre, i64 %index
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store <2 x i32> %tmp13, ptr %tmp14, align 4
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ret void
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}
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