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TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/sub-to-xor-masked.ll
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

73 lines
1.8 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=x86_64 < %s | FileCheck %s --check-prefix=X86
define i8 @sub_nuw_mask_4bit(i8 %x) nounwind {
; X86-LABEL: sub_nuw_mask_4bit:
; X86: # %bb.0:
; X86-NEXT: movl %edi, %eax
; X86-NEXT: xorb $15, %al
; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: retq
%r = sub nuw i8 15, %x
ret i8 %r
}
define i32 @sub_nuw_mask_i32(i32 %x) nounwind {
; X86-LABEL: sub_nuw_mask_i32:
; X86: # %bb.0:
; X86-NEXT: movl %edi, %eax
; X86-NEXT: xorl $65535, %eax # imm = 0xFFFF
; X86-NEXT: retq
%r = sub nuw i32 65535, %x
ret i32 %r
}
define i64 @sub_nuw_mask_i64(i64 %x) nounwind {
; X86-LABEL: sub_nuw_mask_i64:
; X86: # %bb.0:
; X86-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
; X86-NEXT: xorq %rdi, %rax
; X86-NEXT: retq
%r = sub nuw i64 4294967295, %x
ret i64 %r
}
define i8 @sub_nuw_nonmask(i8 %x) nounwind {
; X86-LABEL: sub_nuw_nonmask:
; X86: # %bb.0:
; X86-NEXT: movb $13, %al
; X86-NEXT: subb %dil, %al
; X86-NEXT: retq
%r = sub nuw i8 13, %x
ret i8 %r
}
define i8 @sub_no_nuw(i8 %x) nounwind {
; X86-LABEL: sub_no_nuw:
; X86: # %bb.0:
; X86-NEXT: movb $15, %al
; X86-NEXT: subb %dil, %al
; X86-NEXT: retq
%r = sub i8 15, %x
ret i8 %r
}
define i8 @sub_nsw_only(i8 %x) nounwind {
; X86-LABEL: sub_nsw_only:
; X86: # %bb.0:
; X86-NEXT: movb $15, %al
; X86-NEXT: subb %dil, %al
; X86-NEXT: retq
%r = sub nsw i8 15, %x
ret i8 %r
}
define <4 x i8> @sub_nuw_mask_vec_splat(<4 x i8> %x) nounwind {
; X86-LABEL: sub_nuw_mask_vec_splat:
; X86: # %bb.0:
; X86-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; X86-NEXT: retq
%r = sub nuw <4 x i8> <i8 15, i8 15, i8 15, i8 15>, %x
ret <4 x i8> %r
}