derek.holloway
7502bf64a4
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1253 lines
49 KiB
LLVM
1253 lines
49 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512VL
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;
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; vXf32
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;
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define float @test_v1f32(<1 x float> %a0) {
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; ALL-LABEL: test_v1f32:
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; ALL: # %bb.0:
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; ALL-NEXT: retq
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%1 = call float @llvm.vector.reduce.fmaximum.v1f32(<1 x float> %a0)
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ret float %1
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}
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define float @test_v2f32(<2 x float> %a0) {
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; SSE2-LABEL: test_v2f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movaps %xmm0, %xmm1
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; SSE2-NEXT: cmpunordss %xmm0, %xmm1
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; SSE2-NEXT: movaps %xmm1, %xmm2
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; SSE2-NEXT: andps %xmm0, %xmm2
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; SSE2-NEXT: movaps %xmm0, %xmm3
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; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[1,1]
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; SSE2-NEXT: movaps %xmm0, %xmm4
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; SSE2-NEXT: maxss %xmm3, %xmm4
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; SSE2-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: andps %xmm4, %xmm0
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; SSE2-NEXT: andnps %xmm0, %xmm1
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; SSE2-NEXT: orps %xmm2, %xmm1
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; SSE2-NEXT: movaps %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: test_v2f32:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movaps %xmm0, %xmm1
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; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; SSE41-NEXT: movaps %xmm1, %xmm3
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; SSE41-NEXT: maxss %xmm0, %xmm3
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; SSE41-NEXT: movaps {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
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; SSE41-NEXT: orps %xmm1, %xmm2
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; SSE41-NEXT: andps %xmm3, %xmm2
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; SSE41-NEXT: movaps %xmm1, %xmm0
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; SSE41-NEXT: cmpunordss %xmm1, %xmm0
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; SSE41-NEXT: blendvps %xmm0, %xmm1, %xmm2
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; SSE41-NEXT: movaps %xmm2, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: test_v2f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX1-NEXT: vmaxss %xmm1, %xmm0, %xmm1
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; AVX1-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
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; AVX1-NEXT: vandps %xmm1, %xmm2, %xmm1
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; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
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; AVX1-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: test_v2f32:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
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; AVX2-NEXT: vorps %xmm1, %xmm0, %xmm1
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; AVX2-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX2-NEXT: vmaxss %xmm2, %xmm0, %xmm2
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; AVX2-NEXT: vandps %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
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; AVX2-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: retq
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;
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; AVX512BW-LABEL: test_v2f32:
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; AVX512BW: # %bb.0:
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; AVX512BW-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
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; AVX512BW-NEXT: vorps %xmm1, %xmm0, %xmm1
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; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX512BW-NEXT: vmaxss %xmm2, %xmm0, %xmm2
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; AVX512BW-NEXT: vandps %xmm2, %xmm1, %xmm1
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; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1
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; AVX512BW-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
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; AVX512BW-NEXT: vmovaps %xmm1, %xmm0
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; AVX512BW-NEXT: retq
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;
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; AVX512VL-LABEL: test_v2f32:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX512VL-NEXT: vmaxss %xmm1, %xmm0, %xmm1
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; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm1 = xmm1 & (xmm0 | m32bcst)
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; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1
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; AVX512VL-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
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; AVX512VL-NEXT: vmovaps %xmm1, %xmm0
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; AVX512VL-NEXT: retq
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%1 = call float @llvm.vector.reduce.fmaximum.v2f32(<2 x float> %a0)
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ret float %1
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}
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define float @test_v4f32(<4 x float> %a0) {
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; SSE2-LABEL: test_v4f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movaps %xmm0, %xmm1
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; SSE2-NEXT: movaps %xmm0, %xmm3
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; SSE2-NEXT: movaps %xmm0, %xmm4
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; SSE2-NEXT: movaps %xmm0, %xmm5
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; SSE2-NEXT: movaps %xmm0, %xmm6
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; SSE2-NEXT: cmpunordss %xmm0, %xmm6
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; SSE2-NEXT: movaps %xmm6, %xmm7
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; SSE2-NEXT: andps %xmm0, %xmm6
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; SSE2-NEXT: movaps %xmm0, %xmm2
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; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3],xmm0[3,3]
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; SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[1,1]
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; SSE2-NEXT: maxss %xmm3, %xmm5
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; SSE2-NEXT: movaps {{.*#+}} xmm3 = [NaN,NaN,NaN,NaN]
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; SSE2-NEXT: orps %xmm3, %xmm4
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; SSE2-NEXT: andps %xmm4, %xmm5
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; SSE2-NEXT: andnps %xmm5, %xmm7
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; SSE2-NEXT: orps %xmm7, %xmm6
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; SSE2-NEXT: movaps %xmm6, %xmm4
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; SSE2-NEXT: cmpunordss %xmm6, %xmm4
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; SSE2-NEXT: movaps %xmm4, %xmm0
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; SSE2-NEXT: andps %xmm6, %xmm0
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; SSE2-NEXT: movaps %xmm6, %xmm5
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; SSE2-NEXT: orps %xmm3, %xmm5
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; SSE2-NEXT: maxss %xmm1, %xmm6
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; SSE2-NEXT: andps %xmm5, %xmm6
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; SSE2-NEXT: andnps %xmm6, %xmm4
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; SSE2-NEXT: orps %xmm0, %xmm4
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; SSE2-NEXT: movaps %xmm4, %xmm0
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; SSE2-NEXT: cmpunordss %xmm4, %xmm0
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; SSE2-NEXT: movaps %xmm0, %xmm1
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; SSE2-NEXT: andps %xmm4, %xmm1
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; SSE2-NEXT: orps %xmm4, %xmm3
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; SSE2-NEXT: maxss %xmm2, %xmm4
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; SSE2-NEXT: andps %xmm3, %xmm4
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; SSE2-NEXT: andnps %xmm4, %xmm0
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; SSE2-NEXT: orps %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: test_v4f32:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movaps %xmm0, %xmm1
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; SSE41-NEXT: movaps %xmm0, %xmm3
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; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; SSE41-NEXT: movaps {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
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; SSE41-NEXT: movaps %xmm1, %xmm4
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; SSE41-NEXT: orps %xmm2, %xmm4
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; SSE41-NEXT: movaps %xmm1, %xmm5
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; SSE41-NEXT: maxss %xmm0, %xmm5
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; SSE41-NEXT: andps %xmm4, %xmm5
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; SSE41-NEXT: movaps %xmm1, %xmm0
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; SSE41-NEXT: cmpunordss %xmm1, %xmm0
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; SSE41-NEXT: blendvps %xmm0, %xmm1, %xmm5
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; SSE41-NEXT: movaps %xmm1, %xmm4
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; SSE41-NEXT: shufps {{.*#+}} xmm4 = xmm4[3,3],xmm1[3,3]
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; SSE41-NEXT: movhlps {{.*#+}} xmm3 = xmm3[1,1]
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; SSE41-NEXT: movaps %xmm5, %xmm0
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; SSE41-NEXT: orps %xmm2, %xmm0
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; SSE41-NEXT: movaps %xmm5, %xmm6
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; SSE41-NEXT: maxss %xmm3, %xmm6
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; SSE41-NEXT: andps %xmm0, %xmm6
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; SSE41-NEXT: movaps %xmm5, %xmm0
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; SSE41-NEXT: cmpunordss %xmm5, %xmm0
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; SSE41-NEXT: blendvps %xmm0, %xmm5, %xmm6
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; SSE41-NEXT: orps %xmm6, %xmm2
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; SSE41-NEXT: movaps %xmm6, %xmm1
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; SSE41-NEXT: maxss %xmm4, %xmm1
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; SSE41-NEXT: andps %xmm2, %xmm1
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; SSE41-NEXT: movaps %xmm6, %xmm0
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; SSE41-NEXT: cmpunordss %xmm6, %xmm0
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; SSE41-NEXT: blendvps %xmm0, %xmm6, %xmm1
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; SSE41-NEXT: movaps %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: test_v4f32:
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; AVX: # %bb.0:
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; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]
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; AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm4 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vorps %xmm4, %xmm0, %xmm5
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; AVX-NEXT: vmaxss %xmm3, %xmm0, %xmm3
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; AVX-NEXT: vandps %xmm3, %xmm5, %xmm3
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; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm5
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; AVX-NEXT: vblendvps %xmm5, %xmm0, %xmm3, %xmm0
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; AVX-NEXT: vorps %xmm4, %xmm0, %xmm3
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; AVX-NEXT: vmaxss %xmm2, %xmm0, %xmm2
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; AVX-NEXT: vandps %xmm2, %xmm3, %xmm2
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; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm3
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; AVX-NEXT: vblendvps %xmm3, %xmm0, %xmm2, %xmm0
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; AVX-NEXT: vorps %xmm4, %xmm0, %xmm2
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; AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm1
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; AVX-NEXT: vandps %xmm1, %xmm2, %xmm1
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; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
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; AVX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512BW-LABEL: test_v4f32:
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; AVX512BW: # %bb.0:
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; AVX512BW-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]
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; AVX512BW-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]
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; AVX512BW-NEXT: vbroadcastss {{.*#+}} xmm4 = [NaN,NaN,NaN,NaN]
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; AVX512BW-NEXT: vorps %xmm4, %xmm0, %xmm5
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; AVX512BW-NEXT: vmaxss %xmm3, %xmm0, %xmm3
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; AVX512BW-NEXT: vandps %xmm3, %xmm5, %xmm3
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; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1
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; AVX512BW-NEXT: vmovss %xmm0, %xmm3, %xmm3 {%k1}
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; AVX512BW-NEXT: vorps %xmm4, %xmm3, %xmm0
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; AVX512BW-NEXT: vmaxss %xmm2, %xmm3, %xmm2
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; AVX512BW-NEXT: vandps %xmm2, %xmm0, %xmm2
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; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1
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; AVX512BW-NEXT: vmovss %xmm3, %xmm2, %xmm2 {%k1}
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; AVX512BW-NEXT: vorps %xmm4, %xmm2, %xmm0
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; AVX512BW-NEXT: vmaxss %xmm1, %xmm2, %xmm1
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; AVX512BW-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX512BW-NEXT: vcmpunordss %xmm2, %xmm2, %k1
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; AVX512BW-NEXT: vmovss %xmm2, %xmm0, %xmm0 {%k1}
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; AVX512BW-NEXT: retq
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;
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; AVX512VL-LABEL: test_v4f32:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vshufps {{.*#+}} xmm1 = xmm0[3,3,3,3]
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; AVX512VL-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]
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; AVX512VL-NEXT: vmaxss %xmm3, %xmm0, %xmm3
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; AVX512VL-NEXT: vpbroadcastd {{.*#+}} xmm4 = [NaN,NaN,NaN,NaN]
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; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm3 = xmm3 & (xmm0 | xmm4)
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; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1
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; AVX512VL-NEXT: vmovss %xmm0, %xmm3, %xmm3 {%k1}
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; AVX512VL-NEXT: vmaxss %xmm2, %xmm3, %xmm2
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; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm2 = xmm2 & (xmm3 | xmm4)
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; AVX512VL-NEXT: vcmpunordss %xmm3, %xmm3, %k1
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; AVX512VL-NEXT: vmovss %xmm3, %xmm2, %xmm2 {%k1}
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; AVX512VL-NEXT: vmaxss %xmm1, %xmm2, %xmm0
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; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm2 | xmm4)
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; AVX512VL-NEXT: vcmpunordss %xmm2, %xmm2, %k1
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; AVX512VL-NEXT: vmovss %xmm2, %xmm0, %xmm0 {%k1}
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; AVX512VL-NEXT: retq
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%1 = call float @llvm.vector.reduce.fmaximum.v4f32(<4 x float> %a0)
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ret float %1
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}
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define float @test_v8f32(<8 x float> %a0) {
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; SSE2-LABEL: test_v8f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movaps %xmm0, %xmm2
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; SSE2-NEXT: maxps %xmm1, %xmm2
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; SSE2-NEXT: movaps {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
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; SSE2-NEXT: movaps %xmm0, %xmm3
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; SSE2-NEXT: orps %xmm1, %xmm3
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; SSE2-NEXT: andps %xmm2, %xmm3
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; SSE2-NEXT: movaps %xmm0, %xmm2
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; SSE2-NEXT: cmpunordps %xmm0, %xmm2
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; SSE2-NEXT: andps %xmm2, %xmm0
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; SSE2-NEXT: andnps %xmm3, %xmm2
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; SSE2-NEXT: orps %xmm0, %xmm2
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; SSE2-NEXT: movaps %xmm2, %xmm0
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; SSE2-NEXT: cmpunordss %xmm2, %xmm0
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; SSE2-NEXT: movaps %xmm0, %xmm3
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; SSE2-NEXT: andps %xmm2, %xmm3
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; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,1,1]
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; SSE2-NEXT: movaps %xmm2, %xmm5
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; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm2[2,3,2,3]
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; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm2[3,3,3,3]
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; SSE2-NEXT: maxss %xmm4, %xmm2
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; SSE2-NEXT: orps %xmm1, %xmm5
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; SSE2-NEXT: andps %xmm2, %xmm5
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; SSE2-NEXT: andnps %xmm5, %xmm0
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; SSE2-NEXT: orps %xmm3, %xmm0
|
|
; SSE2-NEXT: movaps %xmm0, %xmm2
|
|
; SSE2-NEXT: cmpunordss %xmm0, %xmm2
|
|
; SSE2-NEXT: movaps %xmm2, %xmm3
|
|
; SSE2-NEXT: andps %xmm0, %xmm3
|
|
; SSE2-NEXT: movaps %xmm0, %xmm4
|
|
; SSE2-NEXT: orps %xmm1, %xmm4
|
|
; SSE2-NEXT: maxss %xmm6, %xmm0
|
|
; SSE2-NEXT: andps %xmm4, %xmm0
|
|
; SSE2-NEXT: andnps %xmm0, %xmm2
|
|
; SSE2-NEXT: orps %xmm3, %xmm2
|
|
; SSE2-NEXT: movaps %xmm2, %xmm0
|
|
; SSE2-NEXT: cmpunordss %xmm2, %xmm0
|
|
; SSE2-NEXT: movaps %xmm0, %xmm3
|
|
; SSE2-NEXT: andps %xmm2, %xmm3
|
|
; SSE2-NEXT: orps %xmm2, %xmm1
|
|
; SSE2-NEXT: maxss %xmm7, %xmm2
|
|
; SSE2-NEXT: andps %xmm1, %xmm2
|
|
; SSE2-NEXT: andnps %xmm2, %xmm0
|
|
; SSE2-NEXT: orps %xmm3, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: test_v8f32:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movaps %xmm0, %xmm2
|
|
; SSE41-NEXT: maxps %xmm1, %xmm0
|
|
; SSE41-NEXT: movaps {{.*#+}} xmm3 = [NaN,NaN,NaN,NaN]
|
|
; SSE41-NEXT: movaps %xmm2, %xmm4
|
|
; SSE41-NEXT: orps %xmm3, %xmm4
|
|
; SSE41-NEXT: andps %xmm0, %xmm4
|
|
; SSE41-NEXT: movaps %xmm2, %xmm0
|
|
; SSE41-NEXT: cmpunordps %xmm2, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm4
|
|
; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm4[1,1,3,3]
|
|
; SSE41-NEXT: movaps %xmm4, %xmm1
|
|
; SSE41-NEXT: maxss %xmm0, %xmm1
|
|
; SSE41-NEXT: movaps %xmm4, %xmm2
|
|
; SSE41-NEXT: orps %xmm3, %xmm2
|
|
; SSE41-NEXT: andps %xmm1, %xmm2
|
|
; SSE41-NEXT: movaps %xmm4, %xmm0
|
|
; SSE41-NEXT: cmpunordss %xmm4, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm4, %xmm2
|
|
; SSE41-NEXT: movaps %xmm2, %xmm0
|
|
; SSE41-NEXT: orps %xmm3, %xmm0
|
|
; SSE41-NEXT: movaps %xmm4, %xmm1
|
|
; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm4[1]
|
|
; SSE41-NEXT: movaps %xmm2, %xmm5
|
|
; SSE41-NEXT: maxss %xmm1, %xmm5
|
|
; SSE41-NEXT: andps %xmm0, %xmm5
|
|
; SSE41-NEXT: movaps %xmm2, %xmm0
|
|
; SSE41-NEXT: cmpunordss %xmm2, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm5
|
|
; SSE41-NEXT: orps %xmm5, %xmm3
|
|
; SSE41-NEXT: shufps {{.*#+}} xmm4 = xmm4[3,3,3,3]
|
|
; SSE41-NEXT: movaps %xmm5, %xmm1
|
|
; SSE41-NEXT: maxss %xmm4, %xmm1
|
|
; SSE41-NEXT: andps %xmm3, %xmm1
|
|
; SSE41-NEXT: movaps %xmm5, %xmm0
|
|
; SSE41-NEXT: cmpunordss %xmm5, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm5, %xmm1
|
|
; SSE41-NEXT: movaps %xmm1, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: test_v8f32:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX-NEXT: vmaxps %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
|
|
; AVX-NEXT: vorps %xmm2, %xmm0, %xmm3
|
|
; AVX-NEXT: vandps %xmm1, %xmm3, %xmm1
|
|
; AVX-NEXT: vcmpunordps %xmm0, %xmm0, %xmm3
|
|
; AVX-NEXT: vblendvps %xmm3, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
|
; AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorps %xmm2, %xmm0, %xmm3
|
|
; AVX-NEXT: vandps %xmm1, %xmm3, %xmm1
|
|
; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm3
|
|
; AVX-NEXT: vblendvps %xmm3, %xmm0, %xmm1, %xmm1
|
|
; AVX-NEXT: vorps %xmm2, %xmm1, %xmm3
|
|
; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]
|
|
; AVX-NEXT: vmaxss %xmm4, %xmm1, %xmm4
|
|
; AVX-NEXT: vandps %xmm4, %xmm3, %xmm3
|
|
; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm4
|
|
; AVX-NEXT: vblendvps %xmm4, %xmm1, %xmm3, %xmm1
|
|
; AVX-NEXT: vorps %xmm2, %xmm1, %xmm2
|
|
; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
|
|
; AVX-NEXT: vmaxss %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vandps %xmm0, %xmm2, %xmm0
|
|
; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm2
|
|
; AVX-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: vzeroupper
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: test_v8f32:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX512BW-NEXT: vmaxps %xmm1, %xmm0, %xmm1
|
|
; AVX512BW-NEXT: vbroadcastss {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
|
|
; AVX512BW-NEXT: vorps %xmm2, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vandps %xmm1, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vcmpunordps %xmm0, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vblendvps %xmm3, %xmm0, %xmm1, %xmm0
|
|
; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
|
; AVX512BW-NEXT: vmaxss %xmm1, %xmm0, %xmm1
|
|
; AVX512BW-NEXT: vorps %xmm2, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vandps %xmm1, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1
|
|
; AVX512BW-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
|
|
; AVX512BW-NEXT: vorps %xmm2, %xmm1, %xmm3
|
|
; AVX512BW-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]
|
|
; AVX512BW-NEXT: vmaxss %xmm4, %xmm1, %xmm4
|
|
; AVX512BW-NEXT: vandps %xmm4, %xmm3, %xmm3
|
|
; AVX512BW-NEXT: vcmpunordss %xmm1, %xmm1, %k1
|
|
; AVX512BW-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k1}
|
|
; AVX512BW-NEXT: vorps %xmm2, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
|
|
; AVX512BW-NEXT: vmaxss %xmm0, %xmm3, %xmm0
|
|
; AVX512BW-NEXT: vandps %xmm0, %xmm1, %xmm0
|
|
; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1
|
|
; AVX512BW-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: test_v8f32:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX512VL-NEXT: vmaxps %xmm1, %xmm0, %xmm1
|
|
; AVX512VL-NEXT: vpbroadcastd {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm1 = xmm1 & (xmm0 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordps %xmm0, %xmm0, %k1
|
|
; AVX512VL-NEXT: vmovaps %xmm0, %xmm1 {%k1}
|
|
; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
|
|
; AVX512VL-NEXT: vmaxss %xmm0, %xmm1, %xmm0
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm1 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordss %xmm1, %xmm1, %k1
|
|
; AVX512VL-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
|
|
; AVX512VL-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]
|
|
; AVX512VL-NEXT: vmaxss %xmm3, %xmm0, %xmm3
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm3 = xmm3 & (xmm0 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1
|
|
; AVX512VL-NEXT: vmovss %xmm0, %xmm3, %xmm3 {%k1}
|
|
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,3,3,3]
|
|
; AVX512VL-NEXT: vmaxss %xmm0, %xmm3, %xmm0
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm3 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordss %xmm3, %xmm3, %k1
|
|
; AVX512VL-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}
|
|
; AVX512VL-NEXT: vzeroupper
|
|
; AVX512VL-NEXT: retq
|
|
%1 = call float @llvm.vector.reduce.fmaximum.v8f32(<8 x float> %a0)
|
|
ret float %1
|
|
}
|
|
|
|
define float @test_v16f32(<16 x float> %a0) {
|
|
; SSE2-LABEL: test_v16f32:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movaps %xmm0, %xmm4
|
|
; SSE2-NEXT: maxps %xmm2, %xmm4
|
|
; SSE2-NEXT: movaps {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
|
|
; SSE2-NEXT: movaps %xmm0, %xmm5
|
|
; SSE2-NEXT: orps %xmm2, %xmm5
|
|
; SSE2-NEXT: andps %xmm4, %xmm5
|
|
; SSE2-NEXT: movaps %xmm0, %xmm4
|
|
; SSE2-NEXT: cmpunordps %xmm0, %xmm4
|
|
; SSE2-NEXT: andps %xmm4, %xmm0
|
|
; SSE2-NEXT: andnps %xmm5, %xmm4
|
|
; SSE2-NEXT: orps %xmm0, %xmm4
|
|
; SSE2-NEXT: movaps %xmm4, %xmm0
|
|
; SSE2-NEXT: cmpunordps %xmm4, %xmm0
|
|
; SSE2-NEXT: movaps %xmm4, %xmm5
|
|
; SSE2-NEXT: andps %xmm0, %xmm5
|
|
; SSE2-NEXT: movaps %xmm1, %xmm6
|
|
; SSE2-NEXT: maxps %xmm3, %xmm6
|
|
; SSE2-NEXT: movaps %xmm1, %xmm3
|
|
; SSE2-NEXT: orps %xmm2, %xmm3
|
|
; SSE2-NEXT: andps %xmm6, %xmm3
|
|
; SSE2-NEXT: movaps %xmm1, %xmm6
|
|
; SSE2-NEXT: cmpunordps %xmm1, %xmm6
|
|
; SSE2-NEXT: andps %xmm6, %xmm1
|
|
; SSE2-NEXT: andnps %xmm3, %xmm6
|
|
; SSE2-NEXT: orps %xmm1, %xmm6
|
|
; SSE2-NEXT: movaps %xmm4, %xmm1
|
|
; SSE2-NEXT: maxps %xmm6, %xmm1
|
|
; SSE2-NEXT: orps %xmm2, %xmm4
|
|
; SSE2-NEXT: andps %xmm1, %xmm4
|
|
; SSE2-NEXT: andnps %xmm4, %xmm0
|
|
; SSE2-NEXT: orps %xmm5, %xmm0
|
|
; SSE2-NEXT: movaps %xmm0, %xmm1
|
|
; SSE2-NEXT: cmpunordss %xmm0, %xmm1
|
|
; SSE2-NEXT: movaps %xmm1, %xmm3
|
|
; SSE2-NEXT: andps %xmm0, %xmm3
|
|
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
|
|
; SSE2-NEXT: movaps %xmm0, %xmm5
|
|
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm0[2,3,2,3]
|
|
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm0[3,3,3,3]
|
|
; SSE2-NEXT: maxss %xmm4, %xmm0
|
|
; SSE2-NEXT: orps %xmm2, %xmm5
|
|
; SSE2-NEXT: andps %xmm0, %xmm5
|
|
; SSE2-NEXT: andnps %xmm5, %xmm1
|
|
; SSE2-NEXT: orps %xmm3, %xmm1
|
|
; SSE2-NEXT: movaps %xmm1, %xmm3
|
|
; SSE2-NEXT: cmpunordss %xmm1, %xmm3
|
|
; SSE2-NEXT: movaps %xmm3, %xmm0
|
|
; SSE2-NEXT: andps %xmm1, %xmm0
|
|
; SSE2-NEXT: movaps %xmm1, %xmm4
|
|
; SSE2-NEXT: orps %xmm2, %xmm4
|
|
; SSE2-NEXT: maxss %xmm6, %xmm1
|
|
; SSE2-NEXT: andps %xmm4, %xmm1
|
|
; SSE2-NEXT: andnps %xmm1, %xmm3
|
|
; SSE2-NEXT: orps %xmm0, %xmm3
|
|
; SSE2-NEXT: movaps %xmm3, %xmm0
|
|
; SSE2-NEXT: cmpunordss %xmm3, %xmm0
|
|
; SSE2-NEXT: movaps %xmm0, %xmm1
|
|
; SSE2-NEXT: andps %xmm3, %xmm1
|
|
; SSE2-NEXT: orps %xmm3, %xmm2
|
|
; SSE2-NEXT: maxss %xmm7, %xmm3
|
|
; SSE2-NEXT: andps %xmm2, %xmm3
|
|
; SSE2-NEXT: andnps %xmm3, %xmm0
|
|
; SSE2-NEXT: orps %xmm1, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: test_v16f32:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movaps %xmm0, %xmm4
|
|
; SSE41-NEXT: movaps %xmm1, %xmm0
|
|
; SSE41-NEXT: maxps %xmm3, %xmm0
|
|
; SSE41-NEXT: movaps {{.*#+}} xmm3 = [NaN,NaN,NaN,NaN]
|
|
; SSE41-NEXT: movaps %xmm1, %xmm5
|
|
; SSE41-NEXT: orps %xmm3, %xmm5
|
|
; SSE41-NEXT: andps %xmm0, %xmm5
|
|
; SSE41-NEXT: movaps %xmm1, %xmm0
|
|
; SSE41-NEXT: cmpunordps %xmm1, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm1, %xmm5
|
|
; SSE41-NEXT: movaps %xmm4, %xmm0
|
|
; SSE41-NEXT: maxps %xmm2, %xmm0
|
|
; SSE41-NEXT: movaps %xmm4, %xmm1
|
|
; SSE41-NEXT: orps %xmm3, %xmm1
|
|
; SSE41-NEXT: andps %xmm0, %xmm1
|
|
; SSE41-NEXT: movaps %xmm4, %xmm0
|
|
; SSE41-NEXT: cmpunordps %xmm4, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm4, %xmm1
|
|
; SSE41-NEXT: movaps %xmm1, %xmm0
|
|
; SSE41-NEXT: maxps %xmm5, %xmm0
|
|
; SSE41-NEXT: movaps %xmm1, %xmm2
|
|
; SSE41-NEXT: orps %xmm3, %xmm2
|
|
; SSE41-NEXT: andps %xmm0, %xmm2
|
|
; SSE41-NEXT: movaps %xmm1, %xmm0
|
|
; SSE41-NEXT: cmpunordps %xmm1, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm1, %xmm2
|
|
; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm2[1,1,3,3]
|
|
; SSE41-NEXT: movaps %xmm2, %xmm1
|
|
; SSE41-NEXT: maxss %xmm0, %xmm1
|
|
; SSE41-NEXT: movaps %xmm2, %xmm4
|
|
; SSE41-NEXT: orps %xmm3, %xmm4
|
|
; SSE41-NEXT: andps %xmm1, %xmm4
|
|
; SSE41-NEXT: movaps %xmm2, %xmm0
|
|
; SSE41-NEXT: cmpunordss %xmm2, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm4
|
|
; SSE41-NEXT: movaps %xmm4, %xmm0
|
|
; SSE41-NEXT: orps %xmm3, %xmm0
|
|
; SSE41-NEXT: movaps %xmm2, %xmm1
|
|
; SSE41-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm2[1]
|
|
; SSE41-NEXT: movaps %xmm4, %xmm5
|
|
; SSE41-NEXT: maxss %xmm1, %xmm5
|
|
; SSE41-NEXT: andps %xmm0, %xmm5
|
|
; SSE41-NEXT: movaps %xmm4, %xmm0
|
|
; SSE41-NEXT: cmpunordss %xmm4, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm4, %xmm5
|
|
; SSE41-NEXT: orps %xmm5, %xmm3
|
|
; SSE41-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]
|
|
; SSE41-NEXT: movaps %xmm5, %xmm1
|
|
; SSE41-NEXT: maxss %xmm2, %xmm1
|
|
; SSE41-NEXT: andps %xmm3, %xmm1
|
|
; SSE41-NEXT: movaps %xmm5, %xmm0
|
|
; SSE41-NEXT: cmpunordss %xmm5, %xmm0
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm5, %xmm1
|
|
; SSE41-NEXT: movaps %xmm1, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: test_v16f32:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vmaxps %ymm1, %ymm0, %ymm1
|
|
; AVX-NEXT: vbroadcastss {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
|
|
; AVX-NEXT: vorps %ymm2, %ymm0, %ymm3
|
|
; AVX-NEXT: vandps %ymm1, %ymm3, %ymm1
|
|
; AVX-NEXT: vcmpunordps %ymm0, %ymm0, %ymm3
|
|
; AVX-NEXT: vblendvps %ymm3, %ymm0, %ymm1, %ymm0
|
|
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX-NEXT: vmaxps %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorps %xmm2, %xmm0, %xmm3
|
|
; AVX-NEXT: vandps %xmm1, %xmm3, %xmm1
|
|
; AVX-NEXT: vcmpunordps %xmm0, %xmm0, %xmm3
|
|
; AVX-NEXT: vblendvps %xmm3, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
|
; AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorps %xmm2, %xmm0, %xmm3
|
|
; AVX-NEXT: vandps %xmm1, %xmm3, %xmm1
|
|
; AVX-NEXT: vcmpunordss %xmm0, %xmm0, %xmm3
|
|
; AVX-NEXT: vblendvps %xmm3, %xmm0, %xmm1, %xmm1
|
|
; AVX-NEXT: vorps %xmm2, %xmm1, %xmm3
|
|
; AVX-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]
|
|
; AVX-NEXT: vmaxss %xmm4, %xmm1, %xmm4
|
|
; AVX-NEXT: vandps %xmm4, %xmm3, %xmm3
|
|
; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm4
|
|
; AVX-NEXT: vblendvps %xmm4, %xmm1, %xmm3, %xmm1
|
|
; AVX-NEXT: vorps %xmm2, %xmm1, %xmm2
|
|
; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
|
|
; AVX-NEXT: vmaxss %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vandps %xmm0, %xmm2, %xmm0
|
|
; AVX-NEXT: vcmpunordss %xmm1, %xmm1, %xmm2
|
|
; AVX-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: vzeroupper
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: test_v16f32:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vextractf64x4 $1, %zmm0, %ymm1
|
|
; AVX512BW-NEXT: vmaxps %ymm1, %ymm0, %ymm1
|
|
; AVX512BW-NEXT: vbroadcastss {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
|
|
; AVX512BW-NEXT: vorps %ymm2, %ymm0, %ymm3
|
|
; AVX512BW-NEXT: vandps %ymm1, %ymm3, %ymm1
|
|
; AVX512BW-NEXT: vcmpunordps %ymm0, %ymm0, %ymm3
|
|
; AVX512BW-NEXT: vblendvps %ymm3, %ymm0, %ymm1, %ymm0
|
|
; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX512BW-NEXT: vmaxps %xmm1, %xmm0, %xmm1
|
|
; AVX512BW-NEXT: vorps %xmm2, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vandps %xmm1, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vcmpunordps %xmm0, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vblendvps %xmm3, %xmm0, %xmm1, %xmm0
|
|
; AVX512BW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
|
; AVX512BW-NEXT: vmaxss %xmm1, %xmm0, %xmm1
|
|
; AVX512BW-NEXT: vorps %xmm2, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vandps %xmm1, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vcmpunordss %xmm0, %xmm0, %k1
|
|
; AVX512BW-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
|
|
; AVX512BW-NEXT: vorps %xmm2, %xmm1, %xmm3
|
|
; AVX512BW-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]
|
|
; AVX512BW-NEXT: vmaxss %xmm4, %xmm1, %xmm4
|
|
; AVX512BW-NEXT: vandps %xmm4, %xmm3, %xmm3
|
|
; AVX512BW-NEXT: vcmpunordss %xmm1, %xmm1, %k1
|
|
; AVX512BW-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k1}
|
|
; AVX512BW-NEXT: vorps %xmm2, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
|
|
; AVX512BW-NEXT: vmaxss %xmm0, %xmm3, %xmm0
|
|
; AVX512BW-NEXT: vandps %xmm0, %xmm1, %xmm0
|
|
; AVX512BW-NEXT: vcmpunordss %xmm3, %xmm3, %k1
|
|
; AVX512BW-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: test_v16f32:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vextractf64x4 $1, %zmm0, %ymm1
|
|
; AVX512VL-NEXT: vmaxps %ymm1, %ymm0, %ymm1
|
|
; AVX512VL-NEXT: vpbroadcastd {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 & (ymm0 | ymm2)
|
|
; AVX512VL-NEXT: vcmpunordps %ymm0, %ymm0, %k1
|
|
; AVX512VL-NEXT: vmovaps %ymm0, %ymm1 {%k1}
|
|
; AVX512VL-NEXT: vextractf128 $1, %ymm1, %xmm0
|
|
; AVX512VL-NEXT: vmaxps %xmm0, %xmm1, %xmm0
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm1 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordps %xmm1, %xmm1, %k1
|
|
; AVX512VL-NEXT: vmovaps %xmm1, %xmm0 {%k1}
|
|
; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
|
|
; AVX512VL-NEXT: vmaxss %xmm1, %xmm0, %xmm1
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm1 = xmm1 & (xmm0 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordss %xmm0, %xmm0, %k1
|
|
; AVX512VL-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
|
|
; AVX512VL-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]
|
|
; AVX512VL-NEXT: vmaxss %xmm3, %xmm1, %xmm3
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm3 = xmm3 & (xmm1 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordss %xmm1, %xmm1, %k1
|
|
; AVX512VL-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k1}
|
|
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
|
|
; AVX512VL-NEXT: vmaxss %xmm0, %xmm3, %xmm0
|
|
; AVX512VL-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm3 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordss %xmm3, %xmm3, %k1
|
|
; AVX512VL-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}
|
|
; AVX512VL-NEXT: vzeroupper
|
|
; AVX512VL-NEXT: retq
|
|
%1 = call float @llvm.vector.reduce.fmaximum.v16f32(<16 x float> %a0)
|
|
ret float %1
|
|
}
|
|
|
|
;
|
|
; vXf64
|
|
;
|
|
|
|
define double @test_v2f64(<2 x double> %a0) {
|
|
; SSE2-LABEL: test_v2f64:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movapd %xmm0, %xmm2
|
|
; SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]
|
|
; SSE2-NEXT: movapd %xmm0, %xmm1
|
|
; SSE2-NEXT: cmpunordsd %xmm0, %xmm1
|
|
; SSE2-NEXT: movapd %xmm1, %xmm3
|
|
; SSE2-NEXT: andpd %xmm0, %xmm3
|
|
; SSE2-NEXT: movapd %xmm0, %xmm4
|
|
; SSE2-NEXT: maxsd %xmm2, %xmm4
|
|
; SSE2-NEXT: orpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; SSE2-NEXT: andpd %xmm4, %xmm0
|
|
; SSE2-NEXT: andnpd %xmm0, %xmm1
|
|
; SSE2-NEXT: orpd %xmm3, %xmm1
|
|
; SSE2-NEXT: movapd %xmm1, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: test_v2f64:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movapd %xmm0, %xmm1
|
|
; SSE41-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
|
|
; SSE41-NEXT: movapd %xmm1, %xmm3
|
|
; SSE41-NEXT: maxsd %xmm0, %xmm3
|
|
; SSE41-NEXT: movapd {{.*#+}} xmm2 = [NaN,NaN]
|
|
; SSE41-NEXT: orpd %xmm1, %xmm2
|
|
; SSE41-NEXT: andpd %xmm3, %xmm2
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: cmpunordsd %xmm1, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm2
|
|
; SSE41-NEXT: movapd %xmm2, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: test_v2f64:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
|
|
; AVX-NEXT: vmaxsd %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
|
|
; AVX-NEXT: vandpd %xmm1, %xmm2, %xmm1
|
|
; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm2
|
|
; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: test_v2f64:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
|
|
; AVX512BW-NEXT: vmaxsd %xmm1, %xmm0, %xmm1
|
|
; AVX512BW-NEXT: vorpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
|
|
; AVX512BW-NEXT: vandpd %xmm1, %xmm2, %xmm1
|
|
; AVX512BW-NEXT: vcmpunordsd %xmm0, %xmm0, %k1
|
|
; AVX512BW-NEXT: vmovsd %xmm0, %xmm1, %xmm1 {%k1}
|
|
; AVX512BW-NEXT: vmovapd %xmm1, %xmm0
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: test_v2f64:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
|
|
; AVX512VL-NEXT: vmaxsd %xmm1, %xmm0, %xmm1
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm1 = xmm1 & (xmm0 | m64bcst)
|
|
; AVX512VL-NEXT: vcmpunordsd %xmm0, %xmm0, %k1
|
|
; AVX512VL-NEXT: vmovsd %xmm0, %xmm1, %xmm1 {%k1}
|
|
; AVX512VL-NEXT: vmovapd %xmm1, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
%1 = call double @llvm.vector.reduce.fmaximum.v2f64(<2 x double> %a0)
|
|
ret double %1
|
|
}
|
|
|
|
define double @test_v4f64(<4 x double> %a0) {
|
|
; SSE2-LABEL: test_v4f64:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movapd %xmm0, %xmm2
|
|
; SSE2-NEXT: maxpd %xmm1, %xmm2
|
|
; SSE2-NEXT: movapd {{.*#+}} xmm1 = [NaN,NaN]
|
|
; SSE2-NEXT: movapd %xmm0, %xmm3
|
|
; SSE2-NEXT: orpd %xmm1, %xmm3
|
|
; SSE2-NEXT: andpd %xmm2, %xmm3
|
|
; SSE2-NEXT: movapd %xmm0, %xmm2
|
|
; SSE2-NEXT: cmpunordpd %xmm0, %xmm2
|
|
; SSE2-NEXT: andpd %xmm2, %xmm0
|
|
; SSE2-NEXT: andnpd %xmm3, %xmm2
|
|
; SSE2-NEXT: orpd %xmm0, %xmm2
|
|
; SSE2-NEXT: movapd %xmm2, %xmm0
|
|
; SSE2-NEXT: cmpunordsd %xmm2, %xmm0
|
|
; SSE2-NEXT: movapd %xmm0, %xmm3
|
|
; SSE2-NEXT: andpd %xmm2, %xmm3
|
|
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[2,3,2,3]
|
|
; SSE2-NEXT: movapd %xmm2, %xmm5
|
|
; SSE2-NEXT: maxsd %xmm4, %xmm5
|
|
; SSE2-NEXT: orpd %xmm1, %xmm2
|
|
; SSE2-NEXT: andpd %xmm5, %xmm2
|
|
; SSE2-NEXT: andnpd %xmm2, %xmm0
|
|
; SSE2-NEXT: orpd %xmm3, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: test_v4f64:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movapd %xmm0, %xmm2
|
|
; SSE41-NEXT: maxpd %xmm1, %xmm0
|
|
; SSE41-NEXT: movapd {{.*#+}} xmm1 = [NaN,NaN]
|
|
; SSE41-NEXT: movapd %xmm2, %xmm3
|
|
; SSE41-NEXT: orpd %xmm1, %xmm3
|
|
; SSE41-NEXT: andpd %xmm0, %xmm3
|
|
; SSE41-NEXT: movapd %xmm2, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm2, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm3
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm3[1]
|
|
; SSE41-NEXT: movapd %xmm3, %xmm2
|
|
; SSE41-NEXT: maxsd %xmm0, %xmm2
|
|
; SSE41-NEXT: orpd %xmm3, %xmm1
|
|
; SSE41-NEXT: andpd %xmm2, %xmm1
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: cmpunordsd %xmm3, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm1
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: test_v4f64:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vmovddup {{.*#+}} xmm2 = [NaN,NaN]
|
|
; AVX-NEXT: # xmm2 = mem[0,0]
|
|
; AVX-NEXT: vorpd %xmm2, %xmm0, %xmm3
|
|
; AVX-NEXT: vandpd %xmm1, %xmm3, %xmm1
|
|
; AVX-NEXT: vcmpunordpd %xmm0, %xmm0, %xmm3
|
|
; AVX-NEXT: vblendvpd %xmm3, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
|
|
; AVX-NEXT: vmaxsd %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorpd %xmm2, %xmm0, %xmm2
|
|
; AVX-NEXT: vandpd %xmm1, %xmm2, %xmm1
|
|
; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm2
|
|
; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vzeroupper
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: test_v4f64:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX512BW-NEXT: vmaxpd %xmm1, %xmm0, %xmm1
|
|
; AVX512BW-NEXT: vmovddup {{.*#+}} xmm2 = [NaN,NaN]
|
|
; AVX512BW-NEXT: # xmm2 = mem[0,0]
|
|
; AVX512BW-NEXT: vorpd %xmm2, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vandpd %xmm1, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vcmpunordpd %xmm0, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vblendvpd %xmm3, %xmm0, %xmm1, %xmm1
|
|
; AVX512BW-NEXT: vshufpd {{.*#+}} xmm0 = xmm1[1,0]
|
|
; AVX512BW-NEXT: vmaxsd %xmm0, %xmm1, %xmm0
|
|
; AVX512BW-NEXT: vorpd %xmm2, %xmm1, %xmm2
|
|
; AVX512BW-NEXT: vandpd %xmm0, %xmm2, %xmm0
|
|
; AVX512BW-NEXT: vcmpunordsd %xmm1, %xmm1, %k1
|
|
; AVX512BW-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: test_v4f64:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX512VL-NEXT: vmaxpd %xmm1, %xmm0, %xmm1
|
|
; AVX512VL-NEXT: vpbroadcastq {{.*#+}} xmm2 = [NaN,NaN]
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm1 = xmm1 & (xmm0 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordpd %xmm0, %xmm0, %k1
|
|
; AVX512VL-NEXT: vmovapd %xmm0, %xmm1 {%k1}
|
|
; AVX512VL-NEXT: vshufpd {{.*#+}} xmm0 = xmm1[1,0]
|
|
; AVX512VL-NEXT: vmaxsd %xmm0, %xmm1, %xmm0
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 & (xmm1 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordsd %xmm1, %xmm1, %k1
|
|
; AVX512VL-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}
|
|
; AVX512VL-NEXT: vzeroupper
|
|
; AVX512VL-NEXT: retq
|
|
%1 = call double @llvm.vector.reduce.fmaximum.v4f64(<4 x double> %a0)
|
|
ret double %1
|
|
}
|
|
|
|
define double @test_v8f64(<8 x double> %a0) {
|
|
; SSE2-LABEL: test_v8f64:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movapd %xmm0, %xmm4
|
|
; SSE2-NEXT: maxpd %xmm2, %xmm4
|
|
; SSE2-NEXT: movapd {{.*#+}} xmm2 = [NaN,NaN]
|
|
; SSE2-NEXT: movapd %xmm0, %xmm6
|
|
; SSE2-NEXT: orpd %xmm2, %xmm6
|
|
; SSE2-NEXT: andpd %xmm4, %xmm6
|
|
; SSE2-NEXT: movapd %xmm0, %xmm5
|
|
; SSE2-NEXT: cmpunordpd %xmm0, %xmm5
|
|
; SSE2-NEXT: andpd %xmm5, %xmm0
|
|
; SSE2-NEXT: andnpd %xmm6, %xmm5
|
|
; SSE2-NEXT: orpd %xmm0, %xmm5
|
|
; SSE2-NEXT: movapd %xmm5, %xmm4
|
|
; SSE2-NEXT: cmpunordpd %xmm5, %xmm4
|
|
; SSE2-NEXT: movapd %xmm5, %xmm0
|
|
; SSE2-NEXT: andpd %xmm4, %xmm0
|
|
; SSE2-NEXT: movapd %xmm1, %xmm6
|
|
; SSE2-NEXT: maxpd %xmm3, %xmm6
|
|
; SSE2-NEXT: movapd %xmm1, %xmm3
|
|
; SSE2-NEXT: orpd %xmm2, %xmm3
|
|
; SSE2-NEXT: andpd %xmm6, %xmm3
|
|
; SSE2-NEXT: movapd %xmm1, %xmm6
|
|
; SSE2-NEXT: cmpunordpd %xmm1, %xmm6
|
|
; SSE2-NEXT: andpd %xmm6, %xmm1
|
|
; SSE2-NEXT: andnpd %xmm3, %xmm6
|
|
; SSE2-NEXT: orpd %xmm1, %xmm6
|
|
; SSE2-NEXT: movapd %xmm5, %xmm1
|
|
; SSE2-NEXT: maxpd %xmm6, %xmm1
|
|
; SSE2-NEXT: orpd %xmm2, %xmm5
|
|
; SSE2-NEXT: andpd %xmm1, %xmm5
|
|
; SSE2-NEXT: andnpd %xmm5, %xmm4
|
|
; SSE2-NEXT: orpd %xmm0, %xmm4
|
|
; SSE2-NEXT: movapd %xmm4, %xmm0
|
|
; SSE2-NEXT: cmpunordsd %xmm4, %xmm0
|
|
; SSE2-NEXT: movapd %xmm0, %xmm1
|
|
; SSE2-NEXT: andpd %xmm4, %xmm1
|
|
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[2,3,2,3]
|
|
; SSE2-NEXT: movapd %xmm4, %xmm5
|
|
; SSE2-NEXT: maxsd %xmm3, %xmm5
|
|
; SSE2-NEXT: orpd %xmm2, %xmm4
|
|
; SSE2-NEXT: andpd %xmm5, %xmm4
|
|
; SSE2-NEXT: andnpd %xmm4, %xmm0
|
|
; SSE2-NEXT: orpd %xmm1, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: test_v8f64:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movapd %xmm0, %xmm4
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm3, %xmm0
|
|
; SSE41-NEXT: movapd {{.*#+}} xmm3 = [NaN,NaN]
|
|
; SSE41-NEXT: movapd %xmm1, %xmm5
|
|
; SSE41-NEXT: orpd %xmm3, %xmm5
|
|
; SSE41-NEXT: andpd %xmm0, %xmm5
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm1, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm5
|
|
; SSE41-NEXT: movapd %xmm4, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm2, %xmm0
|
|
; SSE41-NEXT: movapd %xmm4, %xmm1
|
|
; SSE41-NEXT: orpd %xmm3, %xmm1
|
|
; SSE41-NEXT: andpd %xmm0, %xmm1
|
|
; SSE41-NEXT: movapd %xmm4, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm4, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm4, %xmm1
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm5, %xmm0
|
|
; SSE41-NEXT: movapd %xmm1, %xmm2
|
|
; SSE41-NEXT: orpd %xmm3, %xmm2
|
|
; SSE41-NEXT: andpd %xmm0, %xmm2
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm1, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm2
|
|
; SSE41-NEXT: movapd %xmm2, %xmm0
|
|
; SSE41-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm2[1]
|
|
; SSE41-NEXT: movapd %xmm2, %xmm1
|
|
; SSE41-NEXT: maxsd %xmm0, %xmm1
|
|
; SSE41-NEXT: orpd %xmm2, %xmm3
|
|
; SSE41-NEXT: andpd %xmm1, %xmm3
|
|
; SSE41-NEXT: movapd %xmm2, %xmm0
|
|
; SSE41-NEXT: cmpunordsd %xmm2, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm3
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: test_v8f64:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vmaxpd %ymm1, %ymm0, %ymm1
|
|
; AVX-NEXT: vbroadcastsd {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN]
|
|
; AVX-NEXT: vorpd %ymm2, %ymm0, %ymm3
|
|
; AVX-NEXT: vandpd %ymm1, %ymm3, %ymm1
|
|
; AVX-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm3
|
|
; AVX-NEXT: vblendvpd %ymm3, %ymm0, %ymm1, %ymm0
|
|
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorpd %xmm2, %xmm0, %xmm3
|
|
; AVX-NEXT: vandpd %xmm1, %xmm3, %xmm1
|
|
; AVX-NEXT: vcmpunordpd %xmm0, %xmm0, %xmm3
|
|
; AVX-NEXT: vblendvpd %xmm3, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
|
|
; AVX-NEXT: vmaxsd %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorpd %xmm2, %xmm0, %xmm2
|
|
; AVX-NEXT: vandpd %xmm1, %xmm2, %xmm1
|
|
; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm2
|
|
; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vzeroupper
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: test_v8f64:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vextractf64x4 $1, %zmm0, %ymm1
|
|
; AVX512BW-NEXT: vmaxpd %ymm1, %ymm0, %ymm1
|
|
; AVX512BW-NEXT: vbroadcastsd {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN]
|
|
; AVX512BW-NEXT: vorpd %ymm2, %ymm0, %ymm3
|
|
; AVX512BW-NEXT: vandpd %ymm1, %ymm3, %ymm1
|
|
; AVX512BW-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm3
|
|
; AVX512BW-NEXT: vblendvpd %ymm3, %ymm0, %ymm1, %ymm0
|
|
; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX512BW-NEXT: vmaxpd %xmm1, %xmm0, %xmm1
|
|
; AVX512BW-NEXT: vorpd %xmm2, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vandpd %xmm1, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vcmpunordpd %xmm0, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vblendvpd %xmm3, %xmm0, %xmm1, %xmm1
|
|
; AVX512BW-NEXT: vshufpd {{.*#+}} xmm0 = xmm1[1,0]
|
|
; AVX512BW-NEXT: vmaxsd %xmm0, %xmm1, %xmm0
|
|
; AVX512BW-NEXT: vorpd %xmm2, %xmm1, %xmm2
|
|
; AVX512BW-NEXT: vandpd %xmm0, %xmm2, %xmm0
|
|
; AVX512BW-NEXT: vcmpunordsd %xmm1, %xmm1, %k1
|
|
; AVX512BW-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: test_v8f64:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vextractf64x4 $1, %zmm0, %ymm1
|
|
; AVX512VL-NEXT: vmaxpd %ymm1, %ymm0, %ymm1
|
|
; AVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN]
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 & (ymm0 | ymm2)
|
|
; AVX512VL-NEXT: vcmpunordpd %ymm0, %ymm0, %k1
|
|
; AVX512VL-NEXT: vmovapd %ymm0, %ymm1 {%k1}
|
|
; AVX512VL-NEXT: vextractf128 $1, %ymm1, %xmm0
|
|
; AVX512VL-NEXT: vmaxpd %xmm0, %xmm1, %xmm3
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 & (xmm1 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordpd %xmm1, %xmm1, %k1
|
|
; AVX512VL-NEXT: vmovapd %xmm1, %xmm3 {%k1}
|
|
; AVX512VL-NEXT: vshufpd {{.*#+}} xmm0 = xmm3[1,0]
|
|
; AVX512VL-NEXT: vmaxsd %xmm0, %xmm3, %xmm0
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 & (xmm3 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordsd %xmm3, %xmm3, %k1
|
|
; AVX512VL-NEXT: vmovsd %xmm3, %xmm0, %xmm0 {%k1}
|
|
; AVX512VL-NEXT: vzeroupper
|
|
; AVX512VL-NEXT: retq
|
|
%1 = call double @llvm.vector.reduce.fmaximum.v8f64(<8 x double> %a0)
|
|
ret double %1
|
|
}
|
|
|
|
define double @test_v16f64(<16 x double> %a0) {
|
|
; SSE2-LABEL: test_v16f64:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movapd %xmm0, %xmm8
|
|
; SSE2-NEXT: maxpd %xmm4, %xmm8
|
|
; SSE2-NEXT: movapd {{.*#+}} xmm4 = [NaN,NaN]
|
|
; SSE2-NEXT: movapd %xmm0, %xmm9
|
|
; SSE2-NEXT: orpd %xmm4, %xmm9
|
|
; SSE2-NEXT: andpd %xmm8, %xmm9
|
|
; SSE2-NEXT: movapd %xmm0, %xmm8
|
|
; SSE2-NEXT: cmpunordpd %xmm0, %xmm8
|
|
; SSE2-NEXT: andpd %xmm8, %xmm0
|
|
; SSE2-NEXT: andnpd %xmm9, %xmm8
|
|
; SSE2-NEXT: orpd %xmm0, %xmm8
|
|
; SSE2-NEXT: movapd %xmm8, %xmm0
|
|
; SSE2-NEXT: cmpunordpd %xmm8, %xmm0
|
|
; SSE2-NEXT: movapd %xmm8, %xmm9
|
|
; SSE2-NEXT: andpd %xmm0, %xmm9
|
|
; SSE2-NEXT: movapd %xmm2, %xmm10
|
|
; SSE2-NEXT: maxpd %xmm6, %xmm10
|
|
; SSE2-NEXT: movapd %xmm2, %xmm6
|
|
; SSE2-NEXT: orpd %xmm4, %xmm6
|
|
; SSE2-NEXT: andpd %xmm10, %xmm6
|
|
; SSE2-NEXT: movapd %xmm2, %xmm10
|
|
; SSE2-NEXT: cmpunordpd %xmm2, %xmm10
|
|
; SSE2-NEXT: andpd %xmm10, %xmm2
|
|
; SSE2-NEXT: andnpd %xmm6, %xmm10
|
|
; SSE2-NEXT: orpd %xmm2, %xmm10
|
|
; SSE2-NEXT: movapd %xmm8, %xmm2
|
|
; SSE2-NEXT: maxpd %xmm10, %xmm2
|
|
; SSE2-NEXT: orpd %xmm4, %xmm8
|
|
; SSE2-NEXT: andpd %xmm2, %xmm8
|
|
; SSE2-NEXT: andnpd %xmm8, %xmm0
|
|
; SSE2-NEXT: orpd %xmm9, %xmm0
|
|
; SSE2-NEXT: movapd %xmm0, %xmm2
|
|
; SSE2-NEXT: cmpunordpd %xmm0, %xmm2
|
|
; SSE2-NEXT: movapd %xmm0, %xmm6
|
|
; SSE2-NEXT: andpd %xmm2, %xmm6
|
|
; SSE2-NEXT: movapd %xmm1, %xmm8
|
|
; SSE2-NEXT: maxpd %xmm5, %xmm8
|
|
; SSE2-NEXT: movapd %xmm1, %xmm9
|
|
; SSE2-NEXT: orpd %xmm4, %xmm9
|
|
; SSE2-NEXT: andpd %xmm8, %xmm9
|
|
; SSE2-NEXT: movapd %xmm1, %xmm5
|
|
; SSE2-NEXT: cmpunordpd %xmm1, %xmm5
|
|
; SSE2-NEXT: andpd %xmm5, %xmm1
|
|
; SSE2-NEXT: andnpd %xmm9, %xmm5
|
|
; SSE2-NEXT: orpd %xmm1, %xmm5
|
|
; SSE2-NEXT: movapd %xmm5, %xmm1
|
|
; SSE2-NEXT: cmpunordpd %xmm5, %xmm1
|
|
; SSE2-NEXT: movapd %xmm5, %xmm8
|
|
; SSE2-NEXT: andpd %xmm1, %xmm8
|
|
; SSE2-NEXT: movapd %xmm3, %xmm9
|
|
; SSE2-NEXT: maxpd %xmm7, %xmm9
|
|
; SSE2-NEXT: movapd %xmm3, %xmm7
|
|
; SSE2-NEXT: orpd %xmm4, %xmm7
|
|
; SSE2-NEXT: andpd %xmm9, %xmm7
|
|
; SSE2-NEXT: movapd %xmm3, %xmm9
|
|
; SSE2-NEXT: cmpunordpd %xmm3, %xmm9
|
|
; SSE2-NEXT: andpd %xmm9, %xmm3
|
|
; SSE2-NEXT: andnpd %xmm7, %xmm9
|
|
; SSE2-NEXT: orpd %xmm3, %xmm9
|
|
; SSE2-NEXT: movapd %xmm5, %xmm3
|
|
; SSE2-NEXT: maxpd %xmm9, %xmm3
|
|
; SSE2-NEXT: orpd %xmm4, %xmm5
|
|
; SSE2-NEXT: andpd %xmm3, %xmm5
|
|
; SSE2-NEXT: andnpd %xmm5, %xmm1
|
|
; SSE2-NEXT: orpd %xmm8, %xmm1
|
|
; SSE2-NEXT: movapd %xmm0, %xmm3
|
|
; SSE2-NEXT: maxpd %xmm1, %xmm3
|
|
; SSE2-NEXT: orpd %xmm4, %xmm0
|
|
; SSE2-NEXT: andpd %xmm3, %xmm0
|
|
; SSE2-NEXT: andnpd %xmm0, %xmm2
|
|
; SSE2-NEXT: orpd %xmm6, %xmm2
|
|
; SSE2-NEXT: movapd %xmm2, %xmm0
|
|
; SSE2-NEXT: cmpunordsd %xmm2, %xmm0
|
|
; SSE2-NEXT: movapd %xmm0, %xmm1
|
|
; SSE2-NEXT: andpd %xmm2, %xmm1
|
|
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[2,3,2,3]
|
|
; SSE2-NEXT: movapd %xmm2, %xmm5
|
|
; SSE2-NEXT: maxsd %xmm3, %xmm5
|
|
; SSE2-NEXT: orpd %xmm4, %xmm2
|
|
; SSE2-NEXT: andpd %xmm5, %xmm2
|
|
; SSE2-NEXT: andnpd %xmm2, %xmm0
|
|
; SSE2-NEXT: orpd %xmm1, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: test_v16f64:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movapd %xmm0, %xmm8
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm7, %xmm0
|
|
; SSE41-NEXT: movapd {{.*#+}} xmm7 = [NaN,NaN]
|
|
; SSE41-NEXT: movapd %xmm3, %xmm9
|
|
; SSE41-NEXT: orpd %xmm7, %xmm9
|
|
; SSE41-NEXT: andpd %xmm0, %xmm9
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm3, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm9
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm5, %xmm0
|
|
; SSE41-NEXT: movapd %xmm1, %xmm3
|
|
; SSE41-NEXT: orpd %xmm7, %xmm3
|
|
; SSE41-NEXT: andpd %xmm0, %xmm3
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm1, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm3
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm9, %xmm0
|
|
; SSE41-NEXT: movapd %xmm3, %xmm1
|
|
; SSE41-NEXT: orpd %xmm7, %xmm1
|
|
; SSE41-NEXT: andpd %xmm0, %xmm1
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm3, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm1
|
|
; SSE41-NEXT: movapd %xmm2, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm6, %xmm0
|
|
; SSE41-NEXT: movapd %xmm2, %xmm3
|
|
; SSE41-NEXT: orpd %xmm7, %xmm3
|
|
; SSE41-NEXT: andpd %xmm0, %xmm3
|
|
; SSE41-NEXT: movapd %xmm2, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm2, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm3
|
|
; SSE41-NEXT: movapd %xmm8, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm4, %xmm0
|
|
; SSE41-NEXT: movapd %xmm8, %xmm2
|
|
; SSE41-NEXT: orpd %xmm7, %xmm2
|
|
; SSE41-NEXT: andpd %xmm0, %xmm2
|
|
; SSE41-NEXT: movapd %xmm8, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm8, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm8, %xmm2
|
|
; SSE41-NEXT: movapd %xmm2, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm3, %xmm0
|
|
; SSE41-NEXT: movapd %xmm2, %xmm3
|
|
; SSE41-NEXT: orpd %xmm7, %xmm3
|
|
; SSE41-NEXT: andpd %xmm0, %xmm3
|
|
; SSE41-NEXT: movapd %xmm2, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm2, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm3
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: maxpd %xmm1, %xmm0
|
|
; SSE41-NEXT: movapd %xmm3, %xmm1
|
|
; SSE41-NEXT: orpd %xmm7, %xmm1
|
|
; SSE41-NEXT: andpd %xmm0, %xmm1
|
|
; SSE41-NEXT: movapd %xmm3, %xmm0
|
|
; SSE41-NEXT: cmpunordpd %xmm3, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm1
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
|
|
; SSE41-NEXT: movapd %xmm1, %xmm2
|
|
; SSE41-NEXT: maxsd %xmm0, %xmm2
|
|
; SSE41-NEXT: orpd %xmm1, %xmm7
|
|
; SSE41-NEXT: andpd %xmm2, %xmm7
|
|
; SSE41-NEXT: movapd %xmm1, %xmm0
|
|
; SSE41-NEXT: cmpunordsd %xmm1, %xmm0
|
|
; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm7
|
|
; SSE41-NEXT: movapd %xmm7, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: test_v16f64:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vmaxpd %ymm3, %ymm1, %ymm3
|
|
; AVX-NEXT: vbroadcastsd {{.*#+}} ymm4 = [NaN,NaN,NaN,NaN]
|
|
; AVX-NEXT: vorpd %ymm4, %ymm1, %ymm5
|
|
; AVX-NEXT: vandpd %ymm3, %ymm5, %ymm3
|
|
; AVX-NEXT: vcmpunordpd %ymm1, %ymm1, %ymm5
|
|
; AVX-NEXT: vblendvpd %ymm5, %ymm1, %ymm3, %ymm1
|
|
; AVX-NEXT: vmaxpd %ymm2, %ymm0, %ymm2
|
|
; AVX-NEXT: vorpd %ymm4, %ymm0, %ymm3
|
|
; AVX-NEXT: vandpd %ymm2, %ymm3, %ymm2
|
|
; AVX-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm3
|
|
; AVX-NEXT: vblendvpd %ymm3, %ymm0, %ymm2, %ymm0
|
|
; AVX-NEXT: vmaxpd %ymm1, %ymm0, %ymm1
|
|
; AVX-NEXT: vorpd %ymm4, %ymm0, %ymm2
|
|
; AVX-NEXT: vandpd %ymm1, %ymm2, %ymm1
|
|
; AVX-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm2
|
|
; AVX-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
|
|
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorpd %xmm4, %xmm0, %xmm2
|
|
; AVX-NEXT: vandpd %xmm1, %xmm2, %xmm1
|
|
; AVX-NEXT: vcmpunordpd %xmm0, %xmm0, %xmm2
|
|
; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
|
|
; AVX-NEXT: vmaxsd %xmm1, %xmm0, %xmm1
|
|
; AVX-NEXT: vorpd %xmm4, %xmm0, %xmm2
|
|
; AVX-NEXT: vandpd %xmm1, %xmm2, %xmm1
|
|
; AVX-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm2
|
|
; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
|
|
; AVX-NEXT: vzeroupper
|
|
; AVX-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: test_v16f64:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vmaxpd %zmm1, %zmm0, %zmm1
|
|
; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
|
|
; AVX512BW-NEXT: vpternlogq {{.*#+}} zmm1 = zmm1 & (zmm0 | zmm2)
|
|
; AVX512BW-NEXT: vcmpunordpd %zmm0, %zmm0, %k1
|
|
; AVX512BW-NEXT: vmovapd %zmm0, %zmm1 {%k1}
|
|
; AVX512BW-NEXT: vextractf64x4 $1, %zmm1, %ymm0
|
|
; AVX512BW-NEXT: vmaxpd %ymm0, %ymm1, %ymm0
|
|
; AVX512BW-NEXT: vorpd %ymm2, %ymm1, %ymm3
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; AVX512BW-NEXT: vandpd %ymm0, %ymm3, %ymm0
|
|
; AVX512BW-NEXT: vcmpunordpd %ymm1, %ymm1, %ymm3
|
|
; AVX512BW-NEXT: vblendvpd %ymm3, %ymm1, %ymm0, %ymm0
|
|
; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX512BW-NEXT: vmaxpd %xmm1, %xmm0, %xmm1
|
|
; AVX512BW-NEXT: vorpd %xmm2, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vandpd %xmm1, %xmm3, %xmm1
|
|
; AVX512BW-NEXT: vcmpunordpd %xmm0, %xmm0, %xmm3
|
|
; AVX512BW-NEXT: vblendvpd %xmm3, %xmm0, %xmm1, %xmm1
|
|
; AVX512BW-NEXT: vshufpd {{.*#+}} xmm0 = xmm1[1,0]
|
|
; AVX512BW-NEXT: vmaxsd %xmm0, %xmm1, %xmm0
|
|
; AVX512BW-NEXT: vorpd %xmm2, %xmm1, %xmm2
|
|
; AVX512BW-NEXT: vandpd %xmm0, %xmm2, %xmm0
|
|
; AVX512BW-NEXT: vcmpunordsd %xmm1, %xmm1, %k1
|
|
; AVX512BW-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: test_v16f64:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vmaxpd %zmm1, %zmm0, %zmm1
|
|
; AVX512VL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} zmm1 = zmm1 & (zmm0 | zmm2)
|
|
; AVX512VL-NEXT: vcmpunordpd %zmm0, %zmm0, %k1
|
|
; AVX512VL-NEXT: vmovapd %zmm0, %zmm1 {%k1}
|
|
; AVX512VL-NEXT: vextractf64x4 $1, %zmm1, %ymm0
|
|
; AVX512VL-NEXT: vmaxpd %ymm0, %ymm1, %ymm0
|
|
; AVX512VL-NEXT: vmovdqa %ymm2, %ymm3
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm3 = ymm0 & (ymm3 | ymm1)
|
|
; AVX512VL-NEXT: vcmpunordpd %ymm1, %ymm1, %k1
|
|
; AVX512VL-NEXT: vmovapd %ymm1, %ymm3 {%k1}
|
|
; AVX512VL-NEXT: vextractf128 $1, %ymm3, %xmm0
|
|
; AVX512VL-NEXT: vmaxpd %xmm0, %xmm3, %xmm1
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm1 = xmm1 & (xmm3 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordpd %xmm3, %xmm3, %k1
|
|
; AVX512VL-NEXT: vmovapd %xmm3, %xmm1 {%k1}
|
|
; AVX512VL-NEXT: vshufpd {{.*#+}} xmm0 = xmm1[1,0]
|
|
; AVX512VL-NEXT: vmaxsd %xmm0, %xmm1, %xmm0
|
|
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 & (xmm1 | xmm2)
|
|
; AVX512VL-NEXT: vcmpunordsd %xmm1, %xmm1, %k1
|
|
; AVX512VL-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}
|
|
; AVX512VL-NEXT: vzeroupper
|
|
; AVX512VL-NEXT: retq
|
|
%1 = call double @llvm.vector.reduce.fmaximum.v16f64(<16 x double> %a0)
|
|
ret double %1
|
|
}
|
|
|
|
declare float @llvm.vector.reduce.fmaximum.v1f32(<1 x float>)
|
|
declare float @llvm.vector.reduce.fmaximum.v2f32(<2 x float>)
|
|
declare float @llvm.vector.reduce.fmaximum.v3f32(<3 x float>)
|
|
declare float @llvm.vector.reduce.fmaximum.v4f32(<4 x float>)
|
|
declare float @llvm.vector.reduce.fmaximum.v8f32(<8 x float>)
|
|
declare float @llvm.vector.reduce.fmaximum.v16f32(<16 x float>)
|
|
|
|
declare double @llvm.vector.reduce.fmaximum.v2f64(<2 x double>)
|
|
declare double @llvm.vector.reduce.fmaximum.v4f64(<4 x double>)
|
|
declare double @llvm.vector.reduce.fmaximum.v8f64(<8 x double>)
|
|
declare double @llvm.vector.reduce.fmaximum.v16f64(<16 x double>)
|
|
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
|
|
; SSE: {{.*}}
|