derek.holloway
7502bf64a4
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38 lines
1.5 KiB
LLVM
38 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64-- -O2 | FileCheck %s
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; This test verifies the fix for PR33368.
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;
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; The expected outcome of the operation is to store bytes 0 and 2 of the incoming
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; parameter into c2 (a 2 x i8 vector). DAGCombine converts shuffles into a
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; sequence of extend and subsequent truncate operations. The bug was that an extension
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; by 4 followed by a truncation by 8 was completely eliminated.
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; The test checks for the correct sequence of operations that results from the
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; preservation of the extend/truncate operations mentioned above (2 extend and
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; 3 truncate instructions).
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;
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; NOTE: This operation could be collapsed in to a single truncate. Once that is done
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; this test will have to be adjusted.
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define void @test(double %vec.coerce) local_unnamed_addr {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: packuswb %xmm0, %xmm0
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: retq
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entry:
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%c2 = alloca <2 x i8>, align 2
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%0 = bitcast double %vec.coerce to <8 x i8>
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%1 = shufflevector <8 x i8> %0, <8 x i8> undef, <4 x i32> <i32 2, i32 undef, i32 undef, i32 0>
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%2 = shufflevector <4 x i8> %1, <4 x i8> undef, <2 x i32> <i32 3, i32 0>
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store volatile <2 x i8> %2, ptr %c2, align 2
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br label %if.end
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if.end:
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%3 = bitcast <2 x i8> %2 to i16
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ret void
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}
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