derek.holloway
7502bf64a4
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217 lines
7.1 KiB
LLVM
217 lines
7.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=SSE
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,AVX2
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512,AVX512VL
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl,+avx512bw -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512,AVX512BW
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define void @zero_xmm(<4 x i32> %arg) #0 {
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; SSE-LABEL: zero_xmm:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps %xmm0, 0
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: zero_xmm:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovaps %xmm0, 0
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: zero_xmm:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmovaps %xmm0, 0
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; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX512-NEXT: retq
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store <4 x i32> %arg, ptr null, align 32
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ret void
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}
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define void @zero_ymm(<8 x i32> %arg) #0 {
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; SSE-LABEL: zero_ymm:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps %xmm1, 16
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; SSE-NEXT: movaps %xmm0, 0
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: xorps %xmm1, %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: zero_ymm:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovaps %ymm0, 0
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: zero_ymm:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmovaps %ymm0, 0
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; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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store <8 x i32> %arg, ptr null, align 32
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ret void
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}
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define void @zero_zmm(<16 x i32> %arg) #0 {
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; SSE-LABEL: zero_zmm:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps %xmm3, 48
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; SSE-NEXT: movaps %xmm2, 32
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; SSE-NEXT: movaps %xmm1, 16
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; SSE-NEXT: movaps %xmm0, 0
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: xorps %xmm1, %xmm1
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; SSE-NEXT: xorps %xmm2, %xmm2
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; SSE-NEXT: xorps %xmm3, %xmm3
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; SSE-NEXT: retq
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;
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; AVX-LABEL: zero_zmm:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovaps %ymm1, 32
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; AVX-NEXT: vmovaps %ymm0, 0
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: zero_zmm:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmovups %zmm0, 0
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; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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store <16 x i32> %arg, ptr null, align 32
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ret void
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}
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define void @zero_k(<8 x i32> %arg, <8 x i1> %mask) #0 {
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; SSE-LABEL: zero_k:
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; SSE: # %bb.0:
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; SSE-NEXT: psllw $15, %xmm2
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; SSE-NEXT: packsswb %xmm2, %xmm2
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; SSE-NEXT: pmovmskb %xmm2, %eax
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; SSE-NEXT: testb $1, %al
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; SSE-NEXT: jne .LBB3_1
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; SSE-NEXT: # %bb.2: # %else
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; SSE-NEXT: testb $2, %al
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; SSE-NEXT: jne .LBB3_3
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; SSE-NEXT: .LBB3_4: # %else2
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; SSE-NEXT: testb $4, %al
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; SSE-NEXT: jne .LBB3_5
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; SSE-NEXT: .LBB3_6: # %else4
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; SSE-NEXT: testb $8, %al
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; SSE-NEXT: jne .LBB3_7
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; SSE-NEXT: .LBB3_8: # %else6
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; SSE-NEXT: testb $16, %al
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; SSE-NEXT: jne .LBB3_9
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; SSE-NEXT: .LBB3_10: # %else8
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; SSE-NEXT: testb $32, %al
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; SSE-NEXT: jne .LBB3_11
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; SSE-NEXT: .LBB3_12: # %else10
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; SSE-NEXT: testb $64, %al
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; SSE-NEXT: jne .LBB3_13
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; SSE-NEXT: .LBB3_14: # %else12
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; SSE-NEXT: testb $-128, %al
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; SSE-NEXT: je .LBB3_16
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; SSE-NEXT: .LBB3_15: # %cond.store13
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[3,3,3,3]
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; SSE-NEXT: movd %xmm0, 28
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; SSE-NEXT: .LBB3_16: # %else14
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; SSE-NEXT: xorl %eax, %eax
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; SSE-NEXT: pxor %xmm0, %xmm0
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; SSE-NEXT: pxor %xmm1, %xmm1
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; SSE-NEXT: pxor %xmm2, %xmm2
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; SSE-NEXT: retq
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; SSE-NEXT: .LBB3_1: # %cond.store
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; SSE-NEXT: movd %xmm0, 0
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; SSE-NEXT: testb $2, %al
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; SSE-NEXT: je .LBB3_4
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; SSE-NEXT: .LBB3_3: # %cond.store1
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; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,1,1]
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; SSE-NEXT: movd %xmm2, 4
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; SSE-NEXT: testb $4, %al
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; SSE-NEXT: je .LBB3_6
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; SSE-NEXT: .LBB3_5: # %cond.store3
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; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]
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; SSE-NEXT: movd %xmm2, 8
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; SSE-NEXT: testb $8, %al
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; SSE-NEXT: je .LBB3_8
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; SSE-NEXT: .LBB3_7: # %cond.store5
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
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; SSE-NEXT: movd %xmm0, 12
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; SSE-NEXT: testb $16, %al
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; SSE-NEXT: je .LBB3_10
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; SSE-NEXT: .LBB3_9: # %cond.store7
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; SSE-NEXT: movd %xmm1, 16
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; SSE-NEXT: testb $32, %al
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; SSE-NEXT: je .LBB3_12
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; SSE-NEXT: .LBB3_11: # %cond.store9
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
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; SSE-NEXT: movd %xmm0, 20
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; SSE-NEXT: testb $64, %al
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; SSE-NEXT: je .LBB3_14
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; SSE-NEXT: .LBB3_13: # %cond.store11
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
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; SSE-NEXT: movd %xmm0, 24
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; SSE-NEXT: testb $-128, %al
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; SSE-NEXT: jne .LBB3_15
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; SSE-NEXT: jmp .LBB3_16
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;
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; AVX1-LABEL: zero_k:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
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; AVX1-NEXT: vpslld $31, %xmm2, %xmm2
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; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
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; AVX1-NEXT: vpslld $31, %xmm1, %xmm1
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
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; AVX1-NEXT: vmaskmovps %ymm0, %ymm1, 0
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; AVX1-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX1-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: zero_k:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
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; AVX2-NEXT: vpslld $31, %ymm1, %ymm1
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; AVX2-NEXT: vpmaskmovd %ymm0, %ymm1, 0
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; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512VL-LABEL: zero_k:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vpmovsxwd %xmm1, %ymm1
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; AVX512VL-NEXT: vpslld $31, %ymm1, %ymm1
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; AVX512VL-NEXT: vptestmd %ymm1, %ymm1, %k1
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; AVX512VL-NEXT: vmovdqa32 %ymm0, 0 {%k1}
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; AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX512VL-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX512VL-NEXT: kxorw %k0, %k0, %k1
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; AVX512VL-NEXT: vzeroupper
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; AVX512VL-NEXT: retq
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;
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; AVX512BW-LABEL: zero_k:
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; AVX512BW: # %bb.0:
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; AVX512BW-NEXT: vpsllw $15, %xmm1, %xmm1
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; AVX512BW-NEXT: vpmovw2m %xmm1, %k1
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; AVX512BW-NEXT: vmovdqa32 %ymm0, 0 {%k1}
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; AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX512BW-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX512BW-NEXT: kxorq %k0, %k0, %k1
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; AVX512BW-NEXT: vzeroupper
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; AVX512BW-NEXT: retq
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tail call void @llvm.masked.store.v8i32.p0(<8 x i32> %arg, ptr null, i32 32, <8 x i1> %mask)
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ret void
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}
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attributes #0 = { "zero-call-used-regs"="used" }
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