derek.holloway
7502bf64a4
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286 lines
16 KiB
LLVM
286 lines
16 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; Test handling of llvm.lifetime intrinsics.
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; RUN: opt < %s -passes=asan -asan-use-after-scope -asan-use-after-return=never -asan-use-stack-safety=0 -S | FileCheck %s --check-prefixes=CHECK,CHECK-DEFAULT
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; RUN: opt < %s -passes=asan -asan-use-after-scope -asan-use-after-return=never -asan-use-stack-safety=0 -asan-instrument-dynamic-allocas=0 -S | FileCheck %s --check-prefixes=CHECK,CHECK-NO-DYNAMIC
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare void @llvm.lifetime.start.p0(i64, ptr nocapture) nounwind
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declare void @llvm.lifetime.end.p0(i64, ptr nocapture) nounwind
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; Generic case of lifetime analysis.
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define void @lifetime() sanitize_address {
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; CHECK-DEFAULT-LABEL: define void @lifetime(
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; CHECK-DEFAULT-SAME: ) #[[ATTR0:[0-9]+]] {
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; CHECK-DEFAULT-NEXT: [[TMP1:%.*]] = alloca i64, align 32
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; CHECK-DEFAULT-NEXT: store i64 0, ptr [[TMP1]], align 8
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; CHECK-DEFAULT-NEXT: [[MYALLOCA:%.*]] = alloca i8, i64 64, align 32
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; CHECK-DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[MYALLOCA]], i64 32
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; CHECK-DEFAULT-NEXT: store i64 1102416563, ptr [[MYALLOCA]], align 8
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; CHECK-DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[MYALLOCA]], i64 8
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; CHECK-DEFAULT-NEXT: store i64 ptrtoint (ptr @___asan_gen_stack to i64), ptr [[TMP7]], align 8
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; CHECK-DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[MYALLOCA]], i64 16
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; CHECK-DEFAULT-NEXT: store i64 ptrtoint (ptr @lifetime to i64), ptr [[TMP9]], align 8
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; CHECK-DEFAULT-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[MYALLOCA]] to i64
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; CHECK-DEFAULT-NEXT: [[TMP10:%.*]] = lshr i64 [[TMP2]], 3
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; CHECK-DEFAULT-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 2147450880
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; CHECK-DEFAULT-NEXT: [[TMP12:%.*]] = add i64 [[TMP11]], 0
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; CHECK-DEFAULT-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr
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; CHECK-DEFAULT-NEXT: store i64 -868082052615769615, ptr [[TMP13]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP14:%.*]] = add i64 [[TMP11]], 4
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; CHECK-DEFAULT-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr
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; CHECK-DEFAULT-NEXT: store i8 4, ptr [[TMP15]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[TMP4]] to i64
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; CHECK-DEFAULT-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 3
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; CHECK-DEFAULT-NEXT: [[TMP18:%.*]] = add i64 [[TMP17]], 2147450880
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; CHECK-DEFAULT-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
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; CHECK-DEFAULT-NEXT: [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP21:%.*]] = icmp ne i8 [[TMP20]], 0
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; CHECK-DEFAULT-NEXT: br i1 [[TMP21]], label %[[BB18:.*]], label %[[BB23:.*]], !prof [[PROF1:![0-9]+]]
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; CHECK-DEFAULT: [[BB18]]:
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; CHECK-DEFAULT-NEXT: [[TMP23:%.*]] = and i64 [[TMP16]], 7
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; CHECK-DEFAULT-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i8
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; CHECK-DEFAULT-NEXT: [[TMP25:%.*]] = icmp sge i8 [[TMP24]], [[TMP20]]
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; CHECK-DEFAULT-NEXT: br i1 [[TMP25]], label %[[BB22:.*]], label %[[BB23]]
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; CHECK-DEFAULT: [[BB22]]:
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; CHECK-DEFAULT-NEXT: call void @__asan_report_store1(i64 [[TMP16]]) #[[ATTR4:[0-9]+]]
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; CHECK-DEFAULT-NEXT: unreachable
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; CHECK-DEFAULT: [[BB23]]:
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; CHECK-DEFAULT-NEXT: store volatile i8 0, ptr [[TMP4]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP28:%.*]] = add i64 [[TMP11]], 4
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; CHECK-DEFAULT-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP28]] to ptr
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; CHECK-DEFAULT-NEXT: store i8 -8, ptr [[TMP29]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP30:%.*]] = add i64 [[TMP11]], 4
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; CHECK-DEFAULT-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP30]] to ptr
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; CHECK-DEFAULT-NEXT: store i8 -8, ptr [[TMP31]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP32:%.*]] = alloca i8, i64 128, align 32
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; CHECK-DEFAULT-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP32]] to i64
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; CHECK-DEFAULT-NEXT: [[TMP34:%.*]] = add i64 [[TMP33]], 32
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; CHECK-DEFAULT-NEXT: call void @__asan_alloca_poison(i64 [[TMP34]], i64 40)
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; CHECK-DEFAULT-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP32]] to i64
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; CHECK-DEFAULT-NEXT: store i64 [[TMP35]], ptr [[TMP1]], align 8
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; CHECK-DEFAULT-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP34]] to ptr
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; CHECK-DEFAULT-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[TMP36]] to i64
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; CHECK-DEFAULT-NEXT: call void @__asan_unpoison_stack_memory(i64 [[TMP37]], i64 40)
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; CHECK-DEFAULT-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP36]] to i64
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; CHECK-DEFAULT-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 3
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; CHECK-DEFAULT-NEXT: [[TMP40:%.*]] = add i64 [[TMP39]], 2147450880
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; CHECK-DEFAULT-NEXT: [[TMP41:%.*]] = inttoptr i64 [[TMP40]] to ptr
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; CHECK-DEFAULT-NEXT: [[TMP42:%.*]] = load i8, ptr [[TMP41]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP43:%.*]] = icmp ne i8 [[TMP42]], 0
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; CHECK-DEFAULT-NEXT: br i1 [[TMP43]], label %[[BB40:.*]], label %[[BB45:.*]], !prof [[PROF1]]
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; CHECK-DEFAULT: [[BB40]]:
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; CHECK-DEFAULT-NEXT: [[TMP45:%.*]] = and i64 [[TMP38]], 7
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; CHECK-DEFAULT-NEXT: [[TMP46:%.*]] = trunc i64 [[TMP45]] to i8
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; CHECK-DEFAULT-NEXT: [[TMP47:%.*]] = icmp sge i8 [[TMP46]], [[TMP42]]
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; CHECK-DEFAULT-NEXT: br i1 [[TMP47]], label %[[BB44:.*]], label %[[BB45]]
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; CHECK-DEFAULT: [[BB44]]:
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; CHECK-DEFAULT-NEXT: call void @__asan_report_store1(i64 [[TMP38]]) #[[ATTR4]]
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; CHECK-DEFAULT-NEXT: unreachable
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; CHECK-DEFAULT: [[BB45]]:
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; CHECK-DEFAULT-NEXT: store volatile i8 0, ptr [[TMP36]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP36]] to i64
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; CHECK-DEFAULT-NEXT: call void @__asan_poison_stack_memory(i64 [[TMP50]], i64 40)
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; CHECK-DEFAULT-NEXT: [[TMP51:%.*]] = add i64 [[TMP11]], 4
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; CHECK-DEFAULT-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
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; CHECK-DEFAULT-NEXT: store i8 4, ptr [[TMP52]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP53:%.*]] = ptrtoint ptr [[TMP4]] to i64
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; CHECK-DEFAULT-NEXT: [[TMP54:%.*]] = lshr i64 [[TMP53]], 3
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; CHECK-DEFAULT-NEXT: [[TMP55:%.*]] = add i64 [[TMP54]], 2147450880
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; CHECK-DEFAULT-NEXT: [[TMP56:%.*]] = inttoptr i64 [[TMP55]] to ptr
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; CHECK-DEFAULT-NEXT: [[TMP57:%.*]] = load i8, ptr [[TMP56]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP58:%.*]] = icmp ne i8 [[TMP57]], 0
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; CHECK-DEFAULT-NEXT: br i1 [[TMP58]], label %[[BB55:.*]], label %[[BB60:.*]], !prof [[PROF1]]
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; CHECK-DEFAULT: [[BB55]]:
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; CHECK-DEFAULT-NEXT: [[TMP60:%.*]] = and i64 [[TMP53]], 7
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; CHECK-DEFAULT-NEXT: [[TMP61:%.*]] = trunc i64 [[TMP60]] to i8
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; CHECK-DEFAULT-NEXT: [[TMP62:%.*]] = icmp sge i8 [[TMP61]], [[TMP57]]
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; CHECK-DEFAULT-NEXT: br i1 [[TMP62]], label %[[BB59:.*]], label %[[BB60]]
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; CHECK-DEFAULT: [[BB59]]:
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; CHECK-DEFAULT-NEXT: call void @__asan_report_store1(i64 [[TMP53]]) #[[ATTR4]]
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; CHECK-DEFAULT-NEXT: unreachable
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; CHECK-DEFAULT: [[BB60]]:
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; CHECK-DEFAULT-NEXT: store volatile i8 0, ptr [[TMP4]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP65:%.*]] = add i64 [[TMP11]], 4
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; CHECK-DEFAULT-NEXT: [[TMP66:%.*]] = inttoptr i64 [[TMP65]] to ptr
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; CHECK-DEFAULT-NEXT: store i8 -8, ptr [[TMP66]], align 1
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; CHECK-DEFAULT-NEXT: [[TMP67:%.*]] = ptrtoint ptr [[TMP1]] to i64
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; CHECK-DEFAULT-NEXT: [[TMP68:%.*]] = load i64, ptr [[TMP1]], align 8
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; CHECK-DEFAULT-NEXT: call void @__asan_allocas_unpoison(i64 [[TMP68]], i64 [[TMP67]])
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; CHECK-DEFAULT-NEXT: store i64 1172321806, ptr [[MYALLOCA]], align 8
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; CHECK-DEFAULT-NEXT: [[TMP69:%.*]] = add i64 [[TMP11]], 0
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; CHECK-DEFAULT-NEXT: [[TMP70:%.*]] = inttoptr i64 [[TMP69]] to ptr
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; CHECK-DEFAULT-NEXT: store i64 0, ptr [[TMP70]], align 1
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; CHECK-DEFAULT-NEXT: ret void
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;
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; CHECK-NO-DYNAMIC-LABEL: define void @lifetime(
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; CHECK-NO-DYNAMIC-SAME: ) #[[ATTR0:[0-9]+]] {
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; CHECK-NO-DYNAMIC-NEXT: [[MYALLOCA:%.*]] = alloca i8, i64 64, align 32
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; CHECK-NO-DYNAMIC-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[MYALLOCA]], i64 32
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; CHECK-NO-DYNAMIC-NEXT: store i64 1102416563, ptr [[MYALLOCA]], align 8
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; CHECK-NO-DYNAMIC-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[MYALLOCA]], i64 8
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; CHECK-NO-DYNAMIC-NEXT: store i64 ptrtoint (ptr @___asan_gen_stack to i64), ptr [[TMP6]], align 8
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; CHECK-NO-DYNAMIC-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[MYALLOCA]], i64 16
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; CHECK-NO-DYNAMIC-NEXT: store i64 ptrtoint (ptr @lifetime to i64), ptr [[TMP8]], align 8
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; CHECK-NO-DYNAMIC-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[MYALLOCA]] to i64
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; CHECK-NO-DYNAMIC-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP1]], 3
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; CHECK-NO-DYNAMIC-NEXT: [[TMP10:%.*]] = add i64 [[TMP9]], 2147450880
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; CHECK-NO-DYNAMIC-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
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; CHECK-NO-DYNAMIC-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: store i64 -868082052615769615, ptr [[TMP12]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP13:%.*]] = add i64 [[TMP10]], 4
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; CHECK-NO-DYNAMIC-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: store i8 4, ptr [[TMP14]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[TMP3]] to i64
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; CHECK-NO-DYNAMIC-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP15]], 3
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; CHECK-NO-DYNAMIC-NEXT: [[TMP17:%.*]] = add i64 [[TMP16]], 2147450880
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; CHECK-NO-DYNAMIC-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP20:%.*]] = icmp ne i8 [[TMP19]], 0
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; CHECK-NO-DYNAMIC-NEXT: br i1 [[TMP20]], label %[[BB17:.*]], label %[[BB22:.*]], !prof [[PROF1:![0-9]+]]
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; CHECK-NO-DYNAMIC: [[BB17]]:
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; CHECK-NO-DYNAMIC-NEXT: [[TMP22:%.*]] = and i64 [[TMP15]], 7
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; CHECK-NO-DYNAMIC-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP22]] to i8
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; CHECK-NO-DYNAMIC-NEXT: [[TMP24:%.*]] = icmp sge i8 [[TMP23]], [[TMP19]]
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; CHECK-NO-DYNAMIC-NEXT: br i1 [[TMP24]], label %[[BB21:.*]], label %[[BB22]]
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; CHECK-NO-DYNAMIC: [[BB21]]:
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; CHECK-NO-DYNAMIC-NEXT: call void @__asan_report_store1(i64 [[TMP15]]) #[[ATTR4:[0-9]+]]
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; CHECK-NO-DYNAMIC-NEXT: unreachable
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; CHECK-NO-DYNAMIC: [[BB22]]:
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; CHECK-NO-DYNAMIC-NEXT: store volatile i8 0, ptr [[TMP3]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP27:%.*]] = add i64 [[TMP10]], 4
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; CHECK-NO-DYNAMIC-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: store i8 -8, ptr [[TMP28]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP29:%.*]] = add i64 [[TMP10]], 4
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; CHECK-NO-DYNAMIC-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP29]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: store i8 -8, ptr [[TMP30]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[ARR:%.*]] = alloca [10 x i32], align 16
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; CHECK-NO-DYNAMIC-NEXT: call void @llvm.lifetime.start.p0(ptr [[ARR]])
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; CHECK-NO-DYNAMIC-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[ARR]] to i64
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; CHECK-NO-DYNAMIC-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 3
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; CHECK-NO-DYNAMIC-NEXT: [[TMP33:%.*]] = add i64 [[TMP32]], 2147450880
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; CHECK-NO-DYNAMIC-NEXT: [[TMP34:%.*]] = inttoptr i64 [[TMP33]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: [[TMP35:%.*]] = load i8, ptr [[TMP34]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP36:%.*]] = icmp ne i8 [[TMP35]], 0
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; CHECK-NO-DYNAMIC-NEXT: br i1 [[TMP36]], label %[[BB33:.*]], label %[[BB38:.*]], !prof [[PROF1]]
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; CHECK-NO-DYNAMIC: [[BB33]]:
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; CHECK-NO-DYNAMIC-NEXT: [[TMP38:%.*]] = and i64 [[TMP31]], 7
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; CHECK-NO-DYNAMIC-NEXT: [[TMP39:%.*]] = trunc i64 [[TMP38]] to i8
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; CHECK-NO-DYNAMIC-NEXT: [[TMP40:%.*]] = icmp sge i8 [[TMP39]], [[TMP35]]
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; CHECK-NO-DYNAMIC-NEXT: br i1 [[TMP40]], label %[[BB37:.*]], label %[[BB38]]
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; CHECK-NO-DYNAMIC: [[BB37]]:
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; CHECK-NO-DYNAMIC-NEXT: call void @__asan_report_store1(i64 [[TMP31]]) #[[ATTR4]]
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; CHECK-NO-DYNAMIC-NEXT: unreachable
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; CHECK-NO-DYNAMIC: [[BB38]]:
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; CHECK-NO-DYNAMIC-NEXT: store volatile i8 0, ptr [[ARR]], align 1
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; CHECK-NO-DYNAMIC-NEXT: call void @llvm.lifetime.end.p0(ptr [[ARR]])
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; CHECK-NO-DYNAMIC-NEXT: [[TMP43:%.*]] = add i64 [[TMP10]], 4
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; CHECK-NO-DYNAMIC-NEXT: [[TMP44:%.*]] = inttoptr i64 [[TMP43]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: store i8 4, ptr [[TMP44]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP45:%.*]] = ptrtoint ptr [[TMP3]] to i64
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; CHECK-NO-DYNAMIC-NEXT: [[TMP46:%.*]] = lshr i64 [[TMP45]], 3
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; CHECK-NO-DYNAMIC-NEXT: [[TMP47:%.*]] = add i64 [[TMP46]], 2147450880
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; CHECK-NO-DYNAMIC-NEXT: [[TMP48:%.*]] = inttoptr i64 [[TMP47]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: [[TMP49:%.*]] = load i8, ptr [[TMP48]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP50:%.*]] = icmp ne i8 [[TMP49]], 0
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; CHECK-NO-DYNAMIC-NEXT: br i1 [[TMP50]], label %[[BB47:.*]], label %[[BB52:.*]], !prof [[PROF1]]
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; CHECK-NO-DYNAMIC: [[BB47]]:
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; CHECK-NO-DYNAMIC-NEXT: [[TMP52:%.*]] = and i64 [[TMP45]], 7
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; CHECK-NO-DYNAMIC-NEXT: [[TMP53:%.*]] = trunc i64 [[TMP52]] to i8
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; CHECK-NO-DYNAMIC-NEXT: [[TMP54:%.*]] = icmp sge i8 [[TMP53]], [[TMP49]]
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; CHECK-NO-DYNAMIC-NEXT: br i1 [[TMP54]], label %[[BB51:.*]], label %[[BB52]]
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; CHECK-NO-DYNAMIC: [[BB51]]:
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; CHECK-NO-DYNAMIC-NEXT: call void @__asan_report_store1(i64 [[TMP45]]) #[[ATTR4]]
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; CHECK-NO-DYNAMIC-NEXT: unreachable
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; CHECK-NO-DYNAMIC: [[BB52]]:
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; CHECK-NO-DYNAMIC-NEXT: store volatile i8 0, ptr [[TMP3]], align 1
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; CHECK-NO-DYNAMIC-NEXT: [[TMP57:%.*]] = add i64 [[TMP10]], 4
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; CHECK-NO-DYNAMIC-NEXT: [[TMP58:%.*]] = inttoptr i64 [[TMP57]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: store i8 -8, ptr [[TMP58]], align 1
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; CHECK-NO-DYNAMIC-NEXT: store i64 1172321806, ptr [[MYALLOCA]], align 8
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; CHECK-NO-DYNAMIC-NEXT: [[TMP59:%.*]] = add i64 [[TMP10]], 0
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; CHECK-NO-DYNAMIC-NEXT: [[TMP60:%.*]] = inttoptr i64 [[TMP59]] to ptr
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; CHECK-NO-DYNAMIC-NEXT: store i64 0, ptr [[TMP60]], align 1
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; CHECK-NO-DYNAMIC-NEXT: ret void
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;
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; Regular variable lifetime intrinsics.
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%i = alloca i32, align 4
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; Poison memory in prologue: F1F1F1F1F8F3F3F3
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; Memory is unpoisoned at llvm.lifetime.start
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call void @llvm.lifetime.start.p0(i64 3, ptr %i)
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store volatile i8 0, ptr %i
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call void @llvm.lifetime.end.p0(i64 4, ptr %i)
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; Memory is poisoned at every call to llvm.lifetime.end
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call void @llvm.lifetime.end.p0(i64 2, ptr %i)
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; Lifetime intrinsics for array.
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%arr = alloca [10 x i32], align 16
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call void @llvm.lifetime.start.p0(i64 40, ptr %arr)
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store volatile i8 0, ptr %arr
|
|
|
|
call void @llvm.lifetime.end.p0(i64 40, ptr %arr)
|
|
|
|
; One more lifetime start/end for the same variable %i.
|
|
call void @llvm.lifetime.start.p0(i64 2, ptr %i)
|
|
|
|
store volatile i8 0, ptr %i
|
|
|
|
call void @llvm.lifetime.end.p0(i64 4, ptr %i)
|
|
|
|
; Memory is unpoisoned at function exit (only once).
|
|
ret void
|
|
}
|
|
|
|
define void @zero_sized(i64 %a) #0 {
|
|
; CHECK-LABEL: define void @zero_sized(
|
|
; CHECK-SAME: i64 [[A:%.*]]) {
|
|
; CHECK-NEXT: [[ENTRY:.*:]]
|
|
; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
|
|
; CHECK-NEXT: [[B:%.*]] = alloca [0 x i8], align 1
|
|
; CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr [[B]])
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(ptr [[B]])
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
|
|
entry:
|
|
%a.addr = alloca i64, align 8
|
|
%b = alloca [0 x i8], align 1
|
|
store i64 %a, ptr %a.addr, align 8
|
|
|
|
call void @llvm.lifetime.start.p0(i64 0, ptr %b) #2
|
|
|
|
call void @llvm.lifetime.end.p0(i64 0, ptr %b) #2
|
|
|
|
ret void
|
|
}
|
|
|
|
; Lifetimes on poison should be ignored.
|
|
define void @lifetime_poison(i64 %a) #0 {
|
|
; CHECK-LABEL: define void @lifetime_poison(
|
|
; CHECK-SAME: i64 [[A:%.*]]) {
|
|
; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
|
|
; CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
%a.addr = alloca i64, align 8
|
|
call void @llvm.lifetime.start.p0(i64 8, ptr poison)
|
|
store i64 %a, ptr %a.addr, align 8
|
|
call void @llvm.lifetime.end.p0(i64 8, ptr poison)
|
|
ret void
|
|
}
|
|
;.
|
|
; CHECK-DEFAULT: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}
|
|
;.
|
|
; CHECK-NO-DYNAMIC: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}
|
|
;.
|