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47 lines
2.1 KiB
LLVM
47 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --global-value-regex "x" --version 4
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; RUN: opt < %s -S -passes=hwasan -mtriple=aarch64-linux-gnu -hwasan-globals=0 | FileCheck %s --check-prefixes=NOGLOB
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; RUN: opt < %s -S -passes=hwasan -mtriple=aarch64-linux-gnu -hwasan-globals=1 | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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@x = dso_local global i32 0, align 4
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;.
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; NOGLOB: @x = dso_local global i32 0, align 4
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;.
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; CHECK: @x = alias i32, inttoptr (i64 add (i64 ptrtoint (ptr @x.hwasan to i64), i64 5260204364768739328) to ptr)
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;.
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define dso_local noundef i32 @_Z3tmpv() sanitize_hwaddress {
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; NOGLOB-LABEL: define dso_local noundef i32 @_Z3tmpv(
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; NOGLOB-SAME: ) #[[ATTR0:[0-9]+]] {
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; NOGLOB-NEXT: entry:
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; NOGLOB-NEXT: [[TMP0:%.*]] = load i32, ptr @x, align 4
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; NOGLOB-NEXT: ret i32 [[TMP0]]
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;
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; CHECK-LABEL: define dso_local noundef i32 @_Z3tmpv(
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; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr @__hwasan_tls, align 8
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; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[TMP12]], 4294967295
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; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP1]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
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; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 ptrtoint (ptr @x to i64), 56
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; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
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; CHECK-NEXT: [[TMP5:%.*]] = and i64 ptrtoint (ptr @x to i64), 72057594037927935
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; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP5]], 4
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; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP6]]
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; CHECK-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
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; CHECK-NEXT: [[TMP9:%.*]] = icmp ne i8 [[TMP4]], [[TMP8]]
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; CHECK-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF3:![0-9]+]]
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; CHECK: 10:
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; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP2]], ptr @x, i32 2)
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; CHECK-NEXT: br label [[TMP11]]
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; CHECK: 11:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @x, align 4
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; CHECK-NEXT: ret i32 [[TMP0]]
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;
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entry:
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%0 = load i32, ptr @x, align 4
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ret i32 %0
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}
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