derek.holloway
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46 lines
2.3 KiB
LLVM
46 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -mattr=+neon,+f8f32mm < %s -passes=msan -S | FileCheck %s
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;
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; Forked from llvm/test/CodeGen/AArch64/aarch64-matmul-fp32.ll
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;
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; Strictly handled:
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; - llvm.aarch64.neon.fmmla.v4f32.v16i8
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;
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; Heuristically handled: (none)
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-android9001"
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define <4 x float> @fmmla.v4f32.v16i8(<4 x float> %r, <16 x i8> %a, <16 x i8> %b) sanitize_memory {
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; CHECK-LABEL: define <4 x float> @fmmla.v4f32.v16i8(
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; CHECK-SAME: <4 x float> [[R:%.*]], <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8
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; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 16), align 8
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; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i8>, ptr getelementptr (i8, ptr @__msan_param_tls, i64 32), align 8
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; CHECK-NEXT: call void @llvm.donothing()
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP0]] to i128
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; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP3]], 0
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to i128
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; CHECK-NEXT: [[_MSCMP1:%.*]] = icmp ne i128 [[TMP4]], 0
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; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
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; CHECK-NEXT: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to i128
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; CHECK-NEXT: [[_MSCMP2:%.*]] = icmp ne i128 [[TMP5]], 0
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; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]
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; CHECK-NEXT: br i1 [[_MSOR3]], label %[[BB6:.*]], label %[[BB7:.*]], !prof [[PROF1:![0-9]+]]
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; CHECK: [[BB6]]:
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; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4:[0-9]+]]
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; CHECK-NEXT: unreachable
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; CHECK: [[BB7]]:
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; CHECK-NEXT: [[VFMMLA1_I:%.*]] = tail call <4 x float> @llvm.aarch64.neon.fmmla.v4f32.v16i8(<4 x float> [[R]], <16 x i8> [[A]], <16 x i8> [[B]])
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; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
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; CHECK-NEXT: ret <4 x float> [[VFMMLA1_I]]
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;
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entry:
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%vfmmla1.i = tail call <4 x float> @llvm.aarch64.neon.fmmla.v4f32.v16i8(<4 x float> %r, <16 x i8> %a, <16 x i8> %b) #3
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ret <4 x float> %vfmmla1.i
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}
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;.
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; CHECK: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}
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;.
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