derek.holloway
7502bf64a4
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34 lines
1.5 KiB
ArmAsm
34 lines
1.5 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+sve-b16b16 2>&1 < %s | FileCheck %s
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// --------------------------------------------------------------------------//
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// Invalid vector list
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bfclamp {z0.h-z2.h}, z0.h, z0.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: bfclamp {z0.h-z2.h}, z0.h, z0.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfclamp {z23.h-z24.h}, z13.h, z8.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: bfclamp {z23.h-z24.h}, z13.h, z8.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfclamp {z21.h-z24.h}, z10.h, z21.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
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// CHECK-NEXT: bfclamp {z21.h-z24.h}, z10.h, z21.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid Register Suffix
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bfclamp {z0.s-z1.s}, z0.h, z4.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: bfclamp {z0.s-z1.s}, z0.h, z4.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfclamp {z0.h-z3.h}, z5.d, z6.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: bfclamp {z0.h-z3.h}, z5.d, z6.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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