derek.holloway
7502bf64a4
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47 lines
2.1 KiB
ArmAsm
47 lines
2.1 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+sme-f64f64 2>&1 < %s | FileCheck %s
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// --------------------------------------------------------------------------//
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// Out of range index offset
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fsub za.d[w8, 8, vgx2], {z0.d, z1.d}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
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// CHECK-NEXT: fsub za.d[w8, 8, vgx2], {z0.d, z1.d}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub za.s[w8, -1, vgx4], {z0.s-z3.s}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
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// CHECK-NEXT: fsub za.s[w8, -1, vgx4], {z0.s-z3.s}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid vector select register
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fsub za.d[w7, 7, vgx4], {z0.d-z3.d}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
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// CHECK-NEXT: fsub za.d[w7, 7, vgx4], {z0.d-z3.d}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub za.s[w12, 7, vgx2], {z0.s, z1.s}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
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// CHECK-NEXT: fsub za.s[w12, 7, vgx2], {z0.s, z1.s}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid vector list
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fsub za.d[w8, 0, vgx4], {z0.d-z4.d}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
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// CHECK-NEXT: fsub za.d[w8, 0, vgx4], {z0.d-z4.d}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub za.s[w8, 0, vgx2], {z1.s-z2.s}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: fsub za.s[w8, 0, vgx2], {z1.s-z2.s}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub za.s[w8, 0, vgx4], {z1.s-z4.s}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
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// CHECK-NEXT: fsub za.s[w8, 0, vgx4], {z1.s-z4.s}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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