derek.holloway
7502bf64a4
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77 lines
3.5 KiB
ArmAsm
77 lines
3.5 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-tmop 2>&1 < %s| FileCheck %s
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// --------------------------------------------------------------------------//
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// Invalid ZA register
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ustmopa za4.s, {z30.b-z31.b}, z31.b, z31[3]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: ustmopa za4.s, {z30.b-z31.b}, z31.b, z31[3]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid vector list operand
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ustmopa za3.s, {z29.b-z30.b}, z31.b, z31[3]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: ustmopa za3.s, {z29.b-z30.b}, z31.b, z31[3]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid ZK register
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ustmopa za3.s, {z28.b-z29.b}, z31.b, z19[2]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted vector register, expected register in z20..z23 or z28..z31
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// CHECK-NEXT: ustmopa za3.s, {z28.b-z29.b}, z31.b, z19[2]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ustmopa za3.s, {z28.b-z29.b}, z31.b, z24[2]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted vector register, expected register in z20..z23 or z28..z31
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// CHECK-NEXT: ustmopa za3.s, {z28.b-z29.b}, z31.b, z24[2]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ustmopa za3.s, {z28.b-z29.b}, z31.b, z27[2]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted vector register, expected register in z20..z23 or z28..z31
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// CHECK-NEXT: ustmopa za3.s, {z28.b-z29.b}, z31.b, z27[2]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid immediate
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ustmopa za3.s, {z28.b-z29.b}, z31.b, z29[4]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: ustmopa za3.s, {z28.b-z29.b}, z31.b, z29[4]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid ZPR type suffix
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ustmopa za0.h, {z28.b-z29.b}, z31.b, z20[2]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
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// CHECK-NEXT: ustmopa za0.h, {z28.b-z29.b}, z31.b, z20[2]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ustmopa za0.h, {z28.h-z29.h}, z31.h, z20[2]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
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// CHECK-NEXT: ustmopa za0.h, {z28.h-z29.h}, z31.h, z20[2]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ustmopa za3.s, {z28.h-z29.h}, z31.h, z20[3]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: ustmopa za3.s, {z28.h-z29.h}, z31.h, z20[3]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ustmopa za3.s, {z28.s-z29.s}, z31.s, z20[2]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: ustmopa za3.s, {z28.s-z29.s}, z31.s, z20[2]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ustmopa za3.d, {z28.s-z29.s}, z31.s, z20[3]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
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// CHECK-NEXT: ustmopa za3.d, {z28.s-z29.s}, z31.s, z20[3]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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ustmopa za3.d, {z28.h-z29.h}, z31.h, z20[3]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
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// CHECK-NEXT: ustmopa za3.d, {z28.h-z29.h}, z31.h, z20[3]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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