derek.holloway
7502bf64a4
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129 lines
4.5 KiB
ArmAsm
129 lines
4.5 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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adr z0.s, [z0.s, z0.s]
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// CHECK-INST: adr z0.s, [z0.s, z0.s]
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// CHECK-ENCODING: [0x00,0xa0,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04a0a000 <unknown>
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adr z0.s, [z0.s, z0.s, lsl #0]
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// CHECK-INST: adr z0.s, [z0.s, z0.s]
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// CHECK-ENCODING: [0x00,0xa0,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04a0a000 <unknown>
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adr z0.s, [z0.s, z0.s, lsl #1]
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// CHECK-INST: adr z0.s, [z0.s, z0.s, lsl #1]
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// CHECK-ENCODING: [0x00,0xa4,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04a0a400 <unknown>
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adr z0.s, [z0.s, z0.s, lsl #2]
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// CHECK-INST: adr z0.s, [z0.s, z0.s, lsl #2]
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// CHECK-ENCODING: [0x00,0xa8,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04a0a800 <unknown>
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adr z0.s, [z0.s, z0.s, lsl #3]
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// CHECK-INST: adr z0.s, [z0.s, z0.s, lsl #3]
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// CHECK-ENCODING: [0x00,0xac,0xa0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04a0ac00 <unknown>
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adr z0.d, [z0.d, z0.d]
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// CHECK-INST: adr z0.d, [z0.d, z0.d]
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// CHECK-ENCODING: [0x00,0xa0,0xe0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04e0a000 <unknown>
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adr z0.d, [z0.d, z0.d, lsl #0]
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// CHECK-INST: adr z0.d, [z0.d, z0.d]
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// CHECK-ENCODING: [0x00,0xa0,0xe0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04e0a000 <unknown>
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adr z0.d, [z0.d, z0.d, lsl #1]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, lsl #1]
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// CHECK-ENCODING: [0x00,0xa4,0xe0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04e0a400 <unknown>
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adr z0.d, [z0.d, z0.d, lsl #2]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, lsl #2]
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// CHECK-ENCODING: [0x00,0xa8,0xe0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04e0a800 <unknown>
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adr z0.d, [z0.d, z0.d, lsl #3]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, lsl #3]
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// CHECK-ENCODING: [0x00,0xac,0xe0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 04e0ac00 <unknown>
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adr z0.d, [z0.d, z0.d, uxtw]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, uxtw]
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// CHECK-ENCODING: [0x00,0xa0,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0460a000 <unknown>
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adr z0.d, [z0.d, z0.d, uxtw #0]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, uxtw]
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// CHECK-ENCODING: [0x00,0xa0,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0460a000 <unknown>
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adr z0.d, [z0.d, z0.d, uxtw #1]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, uxtw #1]
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// CHECK-ENCODING: [0x00,0xa4,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0460a400 <unknown>
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adr z0.d, [z0.d, z0.d, uxtw #2]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, uxtw #2]
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// CHECK-ENCODING: [0x00,0xa8,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0460a800 <unknown>
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adr z0.d, [z0.d, z0.d, uxtw #3]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, uxtw #3]
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// CHECK-ENCODING: [0x00,0xac,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0460ac00 <unknown>
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adr z0.d, [z0.d, z0.d, sxtw]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw]
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// CHECK-ENCODING: [0x00,0xa0,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0420a000 <unknown>
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adr z0.d, [z0.d, z0.d, sxtw #0]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw]
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// CHECK-ENCODING: [0x00,0xa0,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0420a000 <unknown>
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adr z0.d, [z0.d, z0.d, sxtw #1]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw #1]
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// CHECK-ENCODING: [0x00,0xa4,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0420a400 <unknown>
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adr z0.d, [z0.d, z0.d, sxtw #2]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw #2]
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// CHECK-ENCODING: [0x00,0xa8,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0420a800 <unknown>
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adr z0.d, [z0.d, z0.d, sxtw #3]
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// CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw #3]
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// CHECK-ENCODING: [0x00,0xac,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 0420ac00 <unknown>
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