derek.holloway
7502bf64a4
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344 lines
14 KiB
ArmAsm
344 lines
14 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p3 2>&1 < %s| FileCheck %s
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// --------------------------------------------------------------------------//
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// Invalid element width
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sqrshrn z10.s, { z0.s, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sqrshrn z10.s, { z0.s, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqrshrn z10.d, { z0.d, z1.d }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sqrshrn z10.d, { z0.d, z1.d }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Mismatched register size suffix
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sqrshrn z0.b, { z0.h, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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// CHECK-NEXT: sqrshrn z0.b, { z0.h, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid operand for instruction
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sqrshrn z10.h, { z0.b, z1.b }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: sqrshrn z10.h, { z0.b, z1.b }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Intermediate out of range
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sqrshrn z10.b, { z0.h, z1.h }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: sqrshrn z10.b, { z0.h, z1.h }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqrshrn z10.b, { z0.h, z1.h }, #9
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: sqrshrn z10.b, { z0.h, z1.h }, #9
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqrshrn z10.b, { z1.h, z2.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: sqrshrn z10.b, { z1.h, z2.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0, z7
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sqrshrn z0.b, { z2.h, z3.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: sqrshrn z0.b, { z2.h, z3.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid element width
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sqrshrun z10.s, { z0.s, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sqrshrun z10.s, { z0.s, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqrshrun z10.d, { z0.d, z1.d }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sqrshrun z10.d, { z0.d, z1.d }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid operand for instruction
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sqrshrun z10.h, { z0.b, z1.b }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: sqrshrun z10.h, { z0.b, z1.b }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Intermediate out of range
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sqrshrun z10.b, { z0.h, z1.h }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: sqrshrun z10.b, { z0.h, z1.h }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqrshrun z10.b, { z0.h, z1.h }, #9
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: sqrshrun z10.b, { z0.h, z1.h }, #9
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqrshrun z10.b, { z1.h, z2.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: sqrshrun z10.b, { z1.h, z2.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Mismatched register size suffix
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sqrshrun z0.b, { z0.h, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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// CHECK-NEXT: sqrshrun z0.b, { z0.h, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0, z7
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sqrshrun z0.b, { z0.h, z1.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: sqrshrun z0.b, { z0.h, z1.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid element width
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sqshrn z10.s, { z0.s, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sqshrn z10.s, { z0.s, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrn z10.d, { z0.d, z1.d }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sqshrn z10.d, { z0.d, z1.d }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Mismatched register size suffix
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sqshrn z0.b, { z0.h, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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// CHECK-NEXT: sqshrn z0.b, { z0.h, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Intermediate out of range
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sqshrn z10.b, { z0.h, z1.h }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: sqshrn z10.b, { z0.h, z1.h }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrn z10.b, { z0.h, z1.h }, #9
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: sqshrn z10.b, { z0.h, z1.h }, #9
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrn z0.h, { z0.s, z1.s }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16].
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// CHECK-NEXT: sqshrn z0.h, { z0.s, z1.s }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrn z0.h, { z0.s, z1.s }, #17
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16].
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// CHECK-NEXT: sqshrn z0.h, { z0.s, z1.s }, #17
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrn z10.b, { z1.h, z2.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: sqshrn z10.b, { z1.h, z2.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0, z7
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sqshrn z0.b, { z0.h, z1.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: sqshrn z0.b, { z0.h, z1.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid element width
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sqshrun z10.s, { z0.s, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sqshrun z10.s, { z0.s, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrun z10.d, { z0.d, z1.d }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sqshrun z10.d, { z0.d, z1.d }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Mismatched register size suffix
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sqshrun z0.b, { z0.h, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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// CHECK-NEXT: sqshrun z0.b, { z0.h, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Intermediate out of range
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sqshrun z10.b, { z0.h, z1.h }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: sqshrun z10.b, { z0.h, z1.h }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrun z10.b, { z0.h, z1.h }, #9
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: sqshrun z10.b, { z0.h, z1.h }, #9
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrun z10.h, { z0.s, z1.s }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16].
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// CHECK-NEXT: sqshrun z10.h, { z0.s, z1.s }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrun z10.h, { z0.s, z1.s }, #17
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16].
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// CHECK-NEXT: sqshrun z10.h, { z0.s, z1.s }, #17
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sqshrun z10.b, { z1.h, z2.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: sqshrun z10.b, { z1.h, z2.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0, z7
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sqshrun z0.b, { z0.h, z1.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: sqshrun z0.b, { z0.h, z1.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid element width
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uqrshrn z10.s, { z0.s, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: uqrshrn z10.s, { z0.s, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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uqrshrn z10.d, { z0.d, z1.d }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: uqrshrn z10.d, { z0.d, z1.d }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Mismatched register size suffix
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uqrshrn z0.b, { z0.h, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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// CHECK-NEXT: uqrshrn z0.b, { z0.h, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid operand for instruction
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uqrshrn z10.h, { z0.b, z1.b }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: uqrshrn z10.h, { z0.b, z1.b }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Intermediate out of range
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uqrshrn z10.b, { z0.h, z1.h }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: uqrshrn z10.b, { z0.h, z1.h }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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uqrshrn z10.b, { z0.h, z1.h }, #9
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: uqrshrn z10.b, { z0.h, z1.h }, #9
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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uqrshrn z10.b, { z1.h, z2.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: uqrshrn z10.b, { z1.h, z2.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0, z7
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uqrshrn z0.b, { z0.h, z1.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: uqrshrn z0.b, { z0.h, z1.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid element width
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uqshrn z10.s, { z0.s, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: uqshrn z10.s, { z0.s, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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uqshrn z10.d, { z0.d, z1.d }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: uqshrn z10.d, { z0.d, z1.d }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Mismatched register size suffix
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uqshrn z0.b, { z0.h, z1.s }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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// CHECK-NEXT: uqshrn z0.b, { z0.h, z1.s }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Intermediate out of range
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uqshrn z10.b, { z0.h, z1.h }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: uqshrn z10.b, { z0.h, z1.h }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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uqshrn z10.b, { z0.h, z1.h }, #9
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8].
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// CHECK-NEXT: uqshrn z10.b, { z0.h, z1.h }, #9
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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uqshrn z0.h, { z0.s, z1.s }, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16].
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// CHECK-NEXT: uqshrn z0.h, { z0.s, z1.s }, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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uqshrn z0.h, { z0.s, z1.s }, #17
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16].
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// CHECK-NEXT: uqshrn z0.h, { z0.s, z1.s }, #17
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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uqshrn z10.b, { z1.h, z2.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: uqshrn z10.b, { z1.h, z2.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0, z7
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uqshrn z0.b, { z0.h, z1.h }, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: uqshrn z0.b, { z0.h, z1.h }, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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