derek.holloway
7502bf64a4
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60 lines
2.8 KiB
ArmAsm
60 lines
2.8 KiB
ArmAsm
// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s -filetype=null 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
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//==============================================================================
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// cache policy is not supported for SMRD instructions
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s_load_dword s1, s[2:3], 0xfc glc slc
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// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: cache policy is not supported for SMRD instructions
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// CHECK-NEXT:{{^}}s_load_dword s1, s[2:3], 0xfc glc slc
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// CHECK-NEXT:{{^}} ^
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s_load_dword s1, s[2:3], 0xfc slc
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// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: cache policy is not supported for SMRD instructions
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// CHECK-NEXT:{{^}}s_load_dword s1, s[2:3], 0xfc slc
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// d16 modifier is not supported on this GPU
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image_gather4 v[5:6], v1, s[8:15], s[12:15] dmask:0x1 d16
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// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: d16 modifier is not supported on this GPU
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// CHECK-NEXT:{{^}}image_gather4 v[5:6], v1, s[8:15], s[12:15] dmask:0x1 d16
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// integer clamping is not supported on this GPU
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v_add_co_u32 v84, s[4:5], v13, v31 clamp
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// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: integer clamping is not supported on this GPU
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// CHECK-NEXT:{{^}}v_add_co_u32 v84, s[4:5], v13, v31 clamp
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// literal operands are not supported
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v_and_b32_e64 v0, 0.159154943091895317852646485335, v1
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// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: literal operands are not supported
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// CHECK-NEXT:{{^}}v_and_b32_e64 v0, 0.159154943091895317852646485335, v1
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// cache policy is not supported for SMRD instructions
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s_load_dword s5, s[2:3], glc
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// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: cache policy is not supported for SMRD instructions
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// CHECK-NEXT:{{^}}s_load_dword s5, s[2:3], glc
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// not a valid operand
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v_alignbit_b32 v5, v1, v2, v3 op_sel:[1,1,1,1]
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// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
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// CHECK-NEXT:{{^}}v_alignbit_b32 v5, v1, v2, v3 op_sel:[1,1,1,1]
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// CHECK-NEXT:{{^}} ^
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v_alignbyte_b32 v5, v1, v2, v3 op_sel:[1,1,1,1]
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// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
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// CHECK-NEXT:{{^}}v_alignbyte_b32 v5, v1, v2, v3 op_sel:[1,1,1,1]
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// CHECK-NEXT:{{^}} ^
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