derek.holloway
7502bf64a4
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348 lines
12 KiB
ArmAsm
348 lines
12 KiB
ArmAsm
// RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx1250 --amdhsa-code-object-version=4 < %s | FileCheck --check-prefixes=ASM,W32 %s
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// RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx1250 --amdhsa-code-object-version=4 -filetype=obj < %s > %t
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// RUN: llvm-readelf -S -r -s %t | FileCheck --check-prefix=READOBJ %s
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// RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
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// RUN: not llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+wavefrontsize64,-wavefrontsize32 --amdhsa-code-object-version=4 < %s -filetype=null 2>&1 | FileCheck --check-prefix=W64-ERR %s
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// READOBJ: Section Headers
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// READOBJ: .text PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9]+}} AX {{[0-9]+}} {{[0-9]+}} 256
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// READOBJ: .rodata PROGBITS {{[0-9a-f]+}} 000640 {{[0-9a-f]+}} {{[0-9]+}} A {{[0-9]+}} {{[0-9]+}} 64
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// READOBJ: Relocation section '.rela.rodata' at offset
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// READOBJ: 0000000000000010 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 10
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// READOBJ: 0000000000000050 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 110
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// READOBJ: 0000000000000090 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 210
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// READOBJ: 00000000000000d0 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 310
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// READOBJ: 0000000000000110 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 410
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// READOBJ: Symbol table '.symtab' contains {{[0-9]+}} entries:
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// READOBJ: 0000000000000000 0 FUNC LOCAL PROTECTED 2 minimal
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// READOBJ-NEXT: 0000000000000100 0 FUNC LOCAL PROTECTED 2 complete
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// READOBJ-NEXT: 0000000000000200 0 FUNC LOCAL PROTECTED 2 special_sgpr
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// READOBJ-NEXT: 0000000000000300 0 FUNC LOCAL PROTECTED 2 disabled_user_sgpr
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// READOBJ-NEXT: 0000000000000400 0 FUNC LOCAL PROTECTED 2 max_lds_size
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// READOBJ-NEXT: 0000000000000500 0 FUNC LOCAL PROTECTED 2 max_vgprs
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// READOBJ-NEXT: 0000000000000000 64 OBJECT LOCAL DEFAULT 3 minimal.kd
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// READOBJ-NEXT: 0000000000000040 64 OBJECT LOCAL DEFAULT 3 complete.kd
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// READOBJ-NEXT: 0000000000000080 64 OBJECT LOCAL DEFAULT 3 special_sgpr.kd
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// READOBJ-NEXT: 00000000000000c0 64 OBJECT LOCAL DEFAULT 3 disabled_user_sgpr.kd
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// READOBJ-NEXT: 0000000000000100 64 OBJECT LOCAL DEFAULT 3 max_lds_size.kd
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// READOBJ-NEXT: 0000000000000140 64 OBJECT LOCAL DEFAULT 3 max_vgprs.kd
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// OBJDUMP: Contents of section .rodata
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// Note, relocation for KERNEL_CODE_ENTRY_BYTE_OFFSET is not resolved here.
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// minimal
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// OBJDUMP-NEXT: 0000 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0010 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0020 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0030 00000cc0 80000000 00040000 00000000
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// complete
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// OBJDUMP-NEXT: 0040 01000000 01000000 0c000000 00000000
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// OBJDUMP-NEXT: 0050 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0060 00000000 00000000 00000000 00c00000
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// OBJDUMP-NEXT: 0070 005021c4 410f007f 5e048200 00000000
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// special_sgpr
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// OBJDUMP-NEXT: 0080 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0090 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 00a0 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 00b0 000000c0 80000000 00040000 00000000
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// disabled_user_sgpr
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// OBJDUMP-NEXT: 00c0 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 00d0 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 00e0 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 00f0 00000cc0 80000000 00040000 00000000
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// max_lds_size
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// OBJDUMP-NEXT: 0100 00000500 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0110 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0120 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0130 00000cc0 80000000 00040000 00000000
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// max_vgprs
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// OBJDUMP-NEXT: 0140 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0150 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0160 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0170 3f000cc0 80000000 00040000 00000000
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.text
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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// ASM: .amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
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.p2align 8
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.type minimal,@function
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minimal:
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s_endpgm
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.p2align 8
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.type complete,@function
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complete:
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s_endpgm
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.p2align 8
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.type special_sgpr,@function
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special_sgpr:
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s_endpgm
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.p2align 8
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.type disabled_user_sgpr,@function
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disabled_user_sgpr:
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s_endpgm
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.p2align 8
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.type max_lds_size,@function
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max_lds_size:
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s_endpgm
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.p2align 8
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.type max_vgprs,@function
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max_vgprs:
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s_endpgm
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.rodata
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// ASM: .rodata
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// Test that only specifying required directives is allowed, and that defaulted
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// values are omitted.
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.p2align 6
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.amdhsa_kernel minimal
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.amdhsa_next_free_vgpr 0
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.amdhsa_next_free_sgpr 0
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.end_amdhsa_kernel
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// ASM: .amdhsa_kernel minimal
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// ASM: .amdhsa_next_free_vgpr 0
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// ASM-NEXT: .amdhsa_next_free_sgpr 0
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// ASM: .end_amdhsa_kernel
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// Test that we can specify all available directives with non-default values.
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.p2align 6
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.amdhsa_kernel complete
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.amdhsa_group_segment_fixed_size 1
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.amdhsa_private_segment_fixed_size 1
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.amdhsa_kernarg_size 12
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.amdhsa_user_sgpr_count 32
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.amdhsa_user_sgpr_dispatch_ptr 1
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.amdhsa_user_sgpr_queue_ptr 1
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.amdhsa_user_sgpr_kernarg_segment_ptr 1
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.amdhsa_user_sgpr_dispatch_id 1
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.amdhsa_user_sgpr_kernarg_preload_length 2
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.amdhsa_user_sgpr_kernarg_preload_offset 1
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.amdhsa_user_sgpr_private_segment_size 1
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.amdhsa_wavefront_size32 1
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.amdhsa_enable_private_segment 1
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.amdhsa_system_sgpr_workgroup_id_x 0
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.amdhsa_system_sgpr_workgroup_id_y 1
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.amdhsa_system_sgpr_workgroup_id_z 1
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.amdhsa_system_sgpr_workgroup_info 1
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.amdhsa_system_vgpr_workitem_id 1
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.amdhsa_next_free_vgpr 9
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.amdhsa_next_free_sgpr 27
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.amdhsa_named_barrier_count 3
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.amdhsa_reserve_vcc 0
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.amdhsa_float_round_mode_32 1
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.amdhsa_float_round_mode_16_64 1
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.amdhsa_float_denorm_mode_32 1
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.amdhsa_float_denorm_mode_16_64 0
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.amdhsa_fp16_overflow 1
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.amdhsa_memory_ordered 1
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.amdhsa_forward_progress 1
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.amdhsa_round_robin_scheduling 1
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.amdhsa_exception_fp_ieee_invalid_op 1
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.amdhsa_exception_fp_denorm_src 1
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.amdhsa_exception_fp_ieee_div_zero 1
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.amdhsa_exception_fp_ieee_overflow 1
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.amdhsa_exception_fp_ieee_underflow 1
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.amdhsa_exception_fp_ieee_inexact 1
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.amdhsa_exception_int_div_zero 1
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.end_amdhsa_kernel
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// ASM: .amdhsa_kernel complete
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// ASM-NEXT: .amdhsa_group_segment_fixed_size 1
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// ASM-NEXT: .amdhsa_private_segment_fixed_size 1
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// ASM-NEXT: .amdhsa_kernarg_size 12
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// ASM-NEXT: .amdhsa_user_sgpr_count 32
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// ASM-NEXT: .amdhsa_user_sgpr_dispatch_ptr 1
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// ASM-NEXT: .amdhsa_user_sgpr_queue_ptr 1
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// ASM-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 1
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// ASM-NEXT: .amdhsa_user_sgpr_dispatch_id 1
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// ASM-NEXT: .amdhsa_user_sgpr_kernarg_preload_length 2
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// ASM-NEXT: .amdhsa_user_sgpr_kernarg_preload_offset 1
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// ASM-NEXT: .amdhsa_user_sgpr_private_segment_size 1
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// ASM-NEXT: .amdhsa_wavefront_size32 1
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// ASM-NEXT: .amdhsa_enable_private_segment 1
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// ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_x 0
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// ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_y 1
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// ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_z 1
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// ASM-NEXT: .amdhsa_system_sgpr_workgroup_info 1
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// ASM-NEXT: .amdhsa_system_vgpr_workitem_id 1
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// ASM-NEXT: .amdhsa_next_free_vgpr 9
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// ASM-NEXT: .amdhsa_next_free_sgpr 32
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// ASM-NEXT: .amdhsa_named_barrier_count 3
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// ASM-NEXT: .amdhsa_reserve_vcc 0
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// ASM-NEXT: .amdhsa_reserve_xnack_mask 1
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// ASM-NEXT: .amdhsa_float_round_mode_32 1
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// ASM-NEXT: .amdhsa_float_round_mode_16_64 1
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// ASM-NEXT: .amdhsa_float_denorm_mode_32 1
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// ASM-NEXT: .amdhsa_float_denorm_mode_16_64 0
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// ASM-NEXT: .amdhsa_fp16_overflow 1
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// ASM-NEXT: .amdhsa_memory_ordered 1
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// ASM-NEXT: .amdhsa_forward_progress 1
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// ASM-NEXT: .amdhsa_inst_pref_size 0
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// ASM-NEXT: .amdhsa_round_robin_scheduling 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_invalid_op 1
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// ASM-NEXT: .amdhsa_exception_fp_denorm_src 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_div_zero 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_overflow 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_underflow 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_inexact 1
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// ASM-NEXT: .amdhsa_exception_int_div_zero 1
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// ASM-NEXT: .end_amdhsa_kernel
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// Test that we are including special SGPR usage in the granulated count.
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.p2align 6
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.amdhsa_kernel special_sgpr
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.amdhsa_next_free_sgpr 27
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.amdhsa_reserve_vcc 0
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.amdhsa_float_denorm_mode_16_64 0
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.amdhsa_next_free_vgpr 0
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.end_amdhsa_kernel
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// ASM: .amdhsa_kernel special_sgpr
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// ASM: .amdhsa_next_free_vgpr 0
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// ASM-NEXT: .amdhsa_next_free_sgpr 27
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// ASM-NEXT: .amdhsa_named_barrier_count 0
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// ASM-NEXT: .amdhsa_reserve_vcc 0
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// ASM: .amdhsa_float_denorm_mode_16_64 0
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// ASM: .end_amdhsa_kernel
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// Test that explicitly disabling user_sgpr's does not affect the user_sgpr
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// count, i.e. this should produce the same descriptor as minimal.
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.p2align 6
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.amdhsa_kernel disabled_user_sgpr
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.amdhsa_next_free_vgpr 0
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.amdhsa_next_free_sgpr 0
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.end_amdhsa_kernel
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// ASM: .amdhsa_kernel disabled_user_sgpr
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// ASM: .amdhsa_next_free_vgpr 0
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// ASM-NEXT: .amdhsa_next_free_sgpr 0
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// ASM: .end_amdhsa_kernel
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.p2align 6
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.amdhsa_kernel max_lds_size
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.amdhsa_group_segment_fixed_size 327680
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.amdhsa_next_free_vgpr 1
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.amdhsa_next_free_sgpr 1
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.end_amdhsa_kernel
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// ASM: .amdhsa_kernel max_lds_size
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// ASM: .amdhsa_group_segment_fixed_size 327680
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// ASM: .end_amdhsa_kernel
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// Test maximum VGPR allocation
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// ASM: .amdhsa_kernel max_vgprs
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// W32: .amdhsa_next_free_vgpr 1024
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// W64-ERR: error: value out of range
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// ASM: .end_amdhsa_kernel
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.p2align 6
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.amdhsa_kernel max_vgprs
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.amdhsa_next_free_vgpr 1024
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.amdhsa_next_free_sgpr 1
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.end_amdhsa_kernel
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.section .foo
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.byte .amdgcn.gfx_generation_number
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// ASM: .byte 12
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.byte .amdgcn.gfx_generation_minor
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// ASM: .byte 5
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.byte .amdgcn.gfx_generation_stepping
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// ASM: .byte 0
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.byte .amdgcn.next_free_vgpr
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// ASM: .byte 0
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.byte .amdgcn.next_free_sgpr
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// ASM: .byte 0
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v_mov_b32_e32 v16, s3
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.byte .amdgcn.next_free_vgpr
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// ASM: .byte 17
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.byte .amdgcn.next_free_sgpr
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// ASM: .byte 4
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.set .amdgcn.next_free_vgpr, 0
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.set .amdgcn.next_free_sgpr, 0
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.byte .amdgcn.next_free_vgpr
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// ASM: .byte 0
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.byte .amdgcn.next_free_sgpr
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// ASM: .byte 0
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v_mov_b32_e32 v16, s3
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.byte .amdgcn.next_free_vgpr
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// ASM: .byte 17
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.byte .amdgcn.next_free_sgpr
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// ASM: .byte 4
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// Metadata
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.amdgpu_metadata
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amdhsa.version:
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- 3
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- 0
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amdhsa.kernels:
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- .name: amd_kernel_code_t_test_all
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.symbol: amd_kernel_code_t_test_all@kd
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.kernarg_segment_size: 8
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.group_segment_fixed_size: 16
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.private_segment_fixed_size: 32
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.kernarg_segment_align: 64
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.wavefront_size: 128
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.sgpr_count: 14
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.vgpr_count: 1024
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.max_flat_workgroup_size: 256
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- .name: amd_kernel_code_t_minimal
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.symbol: amd_kernel_code_t_minimal@kd
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.kernarg_segment_size: 8
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.group_segment_fixed_size: 16
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.private_segment_fixed_size: 32
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.kernarg_segment_align: 64
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.wavefront_size: 128
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.sgpr_count: 14
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.vgpr_count: 40
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.max_flat_workgroup_size: 256
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.end_amdgpu_metadata
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// ASM: .amdgpu_metadata
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// ASM: amdhsa.kernels:
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// ASM: - .group_segment_fixed_size: 16
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// ASM: .kernarg_segment_align: 64
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// ASM: .kernarg_segment_size: 8
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// ASM: .max_flat_workgroup_size: 256
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// ASM: .name: amd_kernel_code_t_test_all
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// ASM: .private_segment_fixed_size: 32
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// ASM: .sgpr_count: 14
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// ASM: .symbol: 'amd_kernel_code_t_test_all@kd'
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// ASM: .vgpr_count: 1024
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// ASM: .wavefront_size: 128
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// ASM: - .group_segment_fixed_size: 16
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// ASM: .kernarg_segment_align: 64
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// ASM: .kernarg_segment_size: 8
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// ASM: .max_flat_workgroup_size: 256
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// ASM: .name: amd_kernel_code_t_minimal
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// ASM: .private_segment_fixed_size: 32
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// ASM: .sgpr_count: 14
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// ASM: .symbol: 'amd_kernel_code_t_minimal@kd'
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// ASM: .vgpr_count: 40
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// ASM: .wavefront_size: 128
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// ASM: amdhsa.version:
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// ASM-NEXT: - 3
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// ASM-NEXT: - 0
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// ASM: .end_amdgpu_metadata
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