derek.holloway
7502bf64a4
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46 lines
1.6 KiB
ArmAsm
46 lines
1.6 KiB
ArmAsm
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --sort --version 6
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// RUN: not llvm-mc -triple=amdgcn %s -filetype=null 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
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// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s -filetype=null 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
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// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s -filetype=null 2>&1 | FileCheck --check-prefixes=GCN,VI --implicit-check-not=error: %s
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// FIXME: This shoudl probably say failed to parse.
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s_mov_b32 s
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// GCN: :[[@LINE-1]]:11: error: invalid operand for instruction
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// Out of range register
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s_mov_b32 s0, s220
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// GCN: :[[@LINE-1]]:15: error: register index is out of range
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s_mov_b32 s0, s[1:2]
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// GCN: :[[@LINE-1]]:15: error: invalid register alignment
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s_mov_b32 s1, v0
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// GCN: :[[@LINE-1]]:15: error: invalid operand for instruction
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s_mov_b32 s102, 1
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// VI: :[[@LINE-1]]:11: error: s102 register not available on this GPU
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s_mov_b32 s103, 1
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// VI: :[[@LINE-1]]:11: error: s103 register not available on this GPU
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s_mov_b32 s220, s0
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// GCN: :[[@LINE-1]]:11: error: register index is out of range
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s_mov_b32 s[1:2], s0
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// GCN: :[[@LINE-1]]:11: error: invalid register alignment
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s_mov_b32 v1, s2
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// GCN: :[[@LINE-1]]:11: error: invalid operand for instruction
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s_mov_b64 s1, s[0:1]
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// GCN: :[[@LINE-1]]:11: error: invalid operand for instruction
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s_mov_b64 s[0:1], s1
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// GCN: :[[@LINE-1]]:19: error: invalid operand for instruction
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s_mov_b64 s[102:103], -1
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// VI: :[[@LINE-1]]:11: error: s[102:103] register not available on this GPU
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s_setpc_b64 0
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// GCN: :[[@LINE-1]]:13: error: invalid operand for instruction
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