derek.holloway
7502bf64a4
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47 lines
1.9 KiB
ArmAsm
47 lines
1.9 KiB
ArmAsm
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --sort --version 6
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// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s -filetype=null 2>&1 | FileCheck %s --implicit-check-not=error:
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// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s -filetype=null 2>&1 | FileCheck %s --implicit-check-not=error:
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// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 %s -filetype=null 2>&1 | FileCheck %s --implicit-check-not=error:
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v_interp_p1_f32_e64 v5, 0.5, attr0.w
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// CHECK: :[[@LINE-1]]:25: error: invalid operand for instruction
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v_interp_p1_f32_e64 v5, s1, attr0.w
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// CHECK: :[[@LINE-1]]:25: error: invalid operand for instruction
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v_interp_p1ll_f16 v5, 0.5, attr0.w
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// CHECK: :[[@LINE-1]]:23: error: invalid operand for instruction
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v_interp_p1ll_f16 v5, s1, attr0.w
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// CHECK: :[[@LINE-1]]:23: error: invalid operand for instruction
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v_interp_p1lv_f16 v5, 0.5, attr0.w, v3
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// CHECK: :[[@LINE-1]]:23: error: invalid operand for instruction
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v_interp_p1lv_f16 v5, s1, attr0.w, v3
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// CHECK: :[[@LINE-1]]:23: error: invalid operand for instruction
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v_interp_p1lv_f16 v5, v1, attr31.w, 0.5
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// CHECK: :[[@LINE-1]]:37: error: invalid operand for instruction
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v_interp_p1lv_f16 v5, v1, attr31.w, s1
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// CHECK: :[[@LINE-1]]:37: error: invalid operand for instruction
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v_interp_p2_f16 v5, 0.5, attr0.w, v3
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// CHECK: :[[@LINE-1]]:21: error: invalid operand for instruction
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v_interp_p2_f16 v5, s1, attr0.w, v3
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// CHECK: :[[@LINE-1]]:21: error: invalid operand for instruction
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v_interp_p2_f16 v5, v1, attr1.w, 0.5
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// CHECK: :[[@LINE-1]]:34: error: invalid operand for instruction
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v_interp_p2_f16 v5, v1, attr1.w, s1
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// CHECK: :[[@LINE-1]]:34: error: invalid operand for instruction
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v_interp_p2_f32_e64 v5, 0.5, attr31.w
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// CHECK: :[[@LINE-1]]:25: error: invalid operand for instruction
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v_interp_p2_f32_e64 v5, s1, attr31.w
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// CHECK: :[[@LINE-1]]:25: error: invalid operand for instruction
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