derek.holloway
7502bf64a4
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1523 lines
57 KiB
Plaintext
1523 lines
57 KiB
Plaintext
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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# VNNI FP16
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# ATT: vdpphps %xmm24, %xmm23, %xmm22
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# INTEL: vdpphps xmm22, xmm23, xmm24
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0x62,0x82,0x44,0x00,0x52,0xf0
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# ATT: vdpphps %xmm24, %xmm23, %xmm22 {%k7}
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# INTEL: vdpphps xmm22 {k7}, xmm23, xmm24
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0x62,0x82,0x44,0x07,0x52,0xf0
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# ATT: vdpphps %xmm24, %xmm23, %xmm22 {%k7} {z}
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# INTEL: vdpphps xmm22 {k7} {z}, xmm23, xmm24
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0x62,0x82,0x44,0x87,0x52,0xf0
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# ATT: vdpphps %ymm24, %ymm23, %ymm22
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# INTEL: vdpphps ymm22, ymm23, ymm24
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0x62,0x82,0x44,0x20,0x52,0xf0
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# ATT: vdpphps %ymm24, %ymm23, %ymm22 {%k7}
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# INTEL: vdpphps ymm22 {k7}, ymm23, ymm24
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0x62,0x82,0x44,0x27,0x52,0xf0
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# ATT: vdpphps %ymm24, %ymm23, %ymm22 {%k7} {z}
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# INTEL: vdpphps ymm22 {k7} {z}, ymm23, ymm24
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0x62,0x82,0x44,0xa7,0x52,0xf0
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# ATT: vdpphps %zmm24, %zmm23, %zmm22
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# INTEL: vdpphps zmm22, zmm23, zmm24
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0x62,0x82,0x44,0x40,0x52,0xf0
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# ATT: vdpphps %zmm24, %zmm23, %zmm22 {%k7}
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# INTEL: vdpphps zmm22 {k7}, zmm23, zmm24
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0x62,0x82,0x44,0x47,0x52,0xf0
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# ATT: vdpphps %zmm24, %zmm23, %zmm22 {%k7} {z}
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# INTEL: vdpphps zmm22 {k7} {z}, zmm23, zmm24
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0x62,0x82,0x44,0xc7,0x52,0xf0
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# ATT: vdpphps 268435456(%rbp,%r14,8), %xmm23, %xmm22
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# INTEL: vdpphps xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
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0x62,0xa2,0x44,0x00,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
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# ATT: vdpphps 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
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# INTEL: vdpphps xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
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0x62,0xc2,0x44,0x07,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
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# ATT: vdpphps (%rip){1to4}, %xmm23, %xmm22
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# INTEL: vdpphps xmm22, xmm23, dword ptr [rip]{1to4}
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0x62,0xe2,0x44,0x10,0x52,0x35,0x00,0x00,0x00,0x00
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# ATT: vdpphps -512(,%rbp,2), %xmm23, %xmm22
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# INTEL: vdpphps xmm22, xmm23, xmmword ptr [2*rbp - 512]
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0x62,0xe2,0x44,0x00,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff
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# ATT: vdpphps 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
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# INTEL: vdpphps xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
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0x62,0xe2,0x44,0x87,0x52,0x71,0x7f
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# ATT: vdpphps -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
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# INTEL: vdpphps xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
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0x62,0xe2,0x44,0x97,0x52,0x72,0x80
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# ATT: vdpphps 268435456(%rbp,%r14,8), %ymm23, %ymm22
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# INTEL: vdpphps ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
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0x62,0xa2,0x44,0x20,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
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# ATT: vdpphps 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
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# INTEL: vdpphps ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
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0x62,0xc2,0x44,0x27,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
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# ATT: vdpphps (%rip){1to8}, %ymm23, %ymm22
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# INTEL: vdpphps ymm22, ymm23, dword ptr [rip]{1to8}
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0x62,0xe2,0x44,0x30,0x52,0x35,0x00,0x00,0x00,0x00
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# ATT: vdpphps -1024(,%rbp,2), %ymm23, %ymm22
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# INTEL: vdpphps ymm22, ymm23, ymmword ptr [2*rbp - 1024]
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0x62,0xe2,0x44,0x20,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff
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# ATT: vdpphps 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
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# INTEL: vdpphps ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
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0x62,0xe2,0x44,0xa7,0x52,0x71,0x7f
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# ATT: vdpphps -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
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# INTEL: vdpphps ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
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0x62,0xe2,0x44,0xb7,0x52,0x72,0x80
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# ATT: vdpphps 268435456(%rbp,%r14,8), %zmm23, %zmm22
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# INTEL: vdpphps zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
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0x62,0xa2,0x44,0x40,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
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# ATT: vdpphps 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
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# INTEL: vdpphps zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
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0x62,0xc2,0x44,0x47,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
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# ATT: vdpphps (%rip){1to16}, %zmm23, %zmm22
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# INTEL: vdpphps zmm22, zmm23, dword ptr [rip]{1to16}
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0x62,0xe2,0x44,0x50,0x52,0x35,0x00,0x00,0x00,0x00
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# ATT: vdpphps -2048(,%rbp,2), %zmm23, %zmm22
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# INTEL: vdpphps zmm22, zmm23, zmmword ptr [2*rbp - 2048]
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0x62,0xe2,0x44,0x40,0x52,0x34,0x6d,0x00,0xf8,0xff,0xff
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# ATT: vdpphps 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
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# INTEL: vdpphps zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
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0x62,0xe2,0x44,0xc7,0x52,0x71,0x7f
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# ATT: vdpphps -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
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# INTEL: vdpphps zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
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0x62,0xe2,0x44,0xd7,0x52,0x72,0x80
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# VNNI INT8
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# ATT: vpdpbssd %xmm24, %xmm23, %xmm22
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# INTEL: vpdpbssd xmm22, xmm23, xmm24
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0x62,0x82,0x47,0x00,0x50,0xf0
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# ATT: vpdpbssd %xmm24, %xmm23, %xmm22 {%k7}
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# INTEL: vpdpbssd xmm22 {k7}, xmm23, xmm24
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0x62,0x82,0x47,0x07,0x50,0xf0
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# ATT: vpdpbssd %xmm24, %xmm23, %xmm22 {%k7} {z}
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# INTEL: vpdpbssd xmm22 {k7} {z}, xmm23, xmm24
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0x62,0x82,0x47,0x87,0x50,0xf0
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# ATT: vpdpbssd %ymm24, %ymm23, %ymm22
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# INTEL: vpdpbssd ymm22, ymm23, ymm24
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0x62,0x82,0x47,0x20,0x50,0xf0
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# ATT: vpdpbssd %ymm24, %ymm23, %ymm22 {%k7}
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# INTEL: vpdpbssd ymm22 {k7}, ymm23, ymm24
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0x62,0x82,0x47,0x27,0x50,0xf0
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# ATT: vpdpbssd %ymm24, %ymm23, %ymm22 {%k7} {z}
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# INTEL: vpdpbssd ymm22 {k7} {z}, ymm23, ymm24
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0x62,0x82,0x47,0xa7,0x50,0xf0
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# ATT: vpdpbssd %zmm24, %zmm23, %zmm22
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# INTEL: vpdpbssd zmm22, zmm23, zmm24
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0x62,0x82,0x47,0x40,0x50,0xf0
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# ATT: vpdpbssd %zmm24, %zmm23, %zmm22 {%k7}
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# INTEL: vpdpbssd zmm22 {k7}, zmm23, zmm24
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0x62,0x82,0x47,0x47,0x50,0xf0
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# ATT: vpdpbssd %zmm24, %zmm23, %zmm22 {%k7} {z}
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# INTEL: vpdpbssd zmm22 {k7} {z}, zmm23, zmm24
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0x62,0x82,0x47,0xc7,0x50,0xf0
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# ATT: vpdpbssd 268435456(%rbp,%r14,8), %xmm23, %xmm22
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# INTEL: vpdpbssd xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
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0x62,0xa2,0x47,0x00,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
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# ATT: vpdpbssd 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
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# INTEL: vpdpbssd xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
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0x62,0xc2,0x47,0x07,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
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# ATT: vpdpbssd (%rip){1to4}, %xmm23, %xmm22
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# INTEL: vpdpbssd xmm22, xmm23, dword ptr [rip]{1to4}
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0x62,0xe2,0x47,0x10,0x50,0x35,0x00,0x00,0x00,0x00
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# ATT: vpdpbssd -512(,%rbp,2), %xmm23, %xmm22
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# INTEL: vpdpbssd xmm22, xmm23, xmmword ptr [2*rbp - 512]
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0x62,0xe2,0x47,0x00,0x50,0x34,0x6d,0x00,0xfe,0xff,0xff
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# ATT: vpdpbssd 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
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# INTEL: vpdpbssd xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
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0x62,0xe2,0x47,0x87,0x50,0x71,0x7f
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# ATT: vpdpbssd -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
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# INTEL: vpdpbssd xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
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0x62,0xe2,0x47,0x97,0x50,0x72,0x80
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# ATT: vpdpbssd 268435456(%rbp,%r14,8), %ymm23, %ymm22
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# INTEL: vpdpbssd ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
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0x62,0xa2,0x47,0x20,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
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# ATT: vpdpbssd 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
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# INTEL: vpdpbssd ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
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0x62,0xc2,0x47,0x27,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
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# ATT: vpdpbssd (%rip){1to8}, %ymm23, %ymm22
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# INTEL: vpdpbssd ymm22, ymm23, dword ptr [rip]{1to8}
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0x62,0xe2,0x47,0x30,0x50,0x35,0x00,0x00,0x00,0x00
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# ATT: vpdpbssd -1024(,%rbp,2), %ymm23, %ymm22
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# INTEL: vpdpbssd ymm22, ymm23, ymmword ptr [2*rbp - 1024]
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0x62,0xe2,0x47,0x20,0x50,0x34,0x6d,0x00,0xfc,0xff,0xff
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# ATT: vpdpbssd 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
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# INTEL: vpdpbssd ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
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0x62,0xe2,0x47,0xa7,0x50,0x71,0x7f
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# ATT: vpdpbssd -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
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# INTEL: vpdpbssd ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
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0x62,0xe2,0x47,0xb7,0x50,0x72,0x80
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# ATT: vpdpbssd 268435456(%rbp,%r14,8), %zmm23, %zmm22
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# INTEL: vpdpbssd zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
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0x62,0xa2,0x47,0x40,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
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# ATT: vpdpbssd 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
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# INTEL: vpdpbssd zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
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0x62,0xc2,0x47,0x47,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
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# ATT: vpdpbssd (%rip){1to16}, %zmm23, %zmm22
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# INTEL: vpdpbssd zmm22, zmm23, dword ptr [rip]{1to16}
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0x62,0xe2,0x47,0x50,0x50,0x35,0x00,0x00,0x00,0x00
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# ATT: vpdpbssd -2048(,%rbp,2), %zmm23, %zmm22
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# INTEL: vpdpbssd zmm22, zmm23, zmmword ptr [2*rbp - 2048]
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0x62,0xe2,0x47,0x40,0x50,0x34,0x6d,0x00,0xf8,0xff,0xff
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# ATT: vpdpbssd 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
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# INTEL: vpdpbssd zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
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0x62,0xe2,0x47,0xc7,0x50,0x71,0x7f
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# ATT: vpdpbssd -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
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# INTEL: vpdpbssd zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
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0x62,0xe2,0x47,0xd7,0x50,0x72,0x80
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# ATT: vpdpbssds %xmm24, %xmm23, %xmm22
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# INTEL: vpdpbssds xmm22, xmm23, xmm24
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0x62,0x82,0x47,0x00,0x51,0xf0
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# ATT: vpdpbssds %xmm24, %xmm23, %xmm22 {%k7}
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# INTEL: vpdpbssds xmm22 {k7}, xmm23, xmm24
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0x62,0x82,0x47,0x07,0x51,0xf0
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# ATT: vpdpbssds %xmm24, %xmm23, %xmm22 {%k7} {z}
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# INTEL: vpdpbssds xmm22 {k7} {z}, xmm23, xmm24
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0x62,0x82,0x47,0x87,0x51,0xf0
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# ATT: vpdpbssds %ymm24, %ymm23, %ymm22
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# INTEL: vpdpbssds ymm22, ymm23, ymm24
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0x62,0x82,0x47,0x20,0x51,0xf0
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# ATT: vpdpbssds %ymm24, %ymm23, %ymm22 {%k7}
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# INTEL: vpdpbssds ymm22 {k7}, ymm23, ymm24
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0x62,0x82,0x47,0x27,0x51,0xf0
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# ATT: vpdpbssds %ymm24, %ymm23, %ymm22 {%k7} {z}
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# INTEL: vpdpbssds ymm22 {k7} {z}, ymm23, ymm24
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0x62,0x82,0x47,0xa7,0x51,0xf0
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# ATT: vpdpbssds %zmm24, %zmm23, %zmm22
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# INTEL: vpdpbssds zmm22, zmm23, zmm24
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0x62,0x82,0x47,0x40,0x51,0xf0
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# ATT: vpdpbssds %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbssds zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x47,0x47,0x51,0xf0
|
|
|
|
# ATT: vpdpbssds %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbssds zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x47,0xc7,0x51,0xf0
|
|
|
|
# ATT: vpdpbssds 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpbssds xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x47,0x00,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbssds 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbssds xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x47,0x07,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbssds (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpbssds xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x47,0x10,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbssds -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpbssds xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x47,0x00,0x51,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpbssds 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbssds xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x47,0x87,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbssds -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbssds xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x47,0x97,0x51,0x72,0x80
|
|
|
|
# ATT: vpdpbssds 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpbssds ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x47,0x20,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbssds 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbssds ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x47,0x27,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbssds (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpbssds ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x47,0x30,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbssds -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpbssds ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x47,0x20,0x51,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpbssds 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbssds ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x47,0xa7,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbssds -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbssds ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x47,0xb7,0x51,0x72,0x80
|
|
|
|
# ATT: vpdpbssds 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpbssds zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x47,0x40,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbssds 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbssds zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x47,0x47,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbssds (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpbssds zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x47,0x50,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbssds -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpbssds zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x47,0x40,0x51,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpbssds 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbssds zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x47,0xc7,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbssds -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbssds zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x47,0xd7,0x51,0x72,0x80
|
|
|
|
# ATT: vpdpbsud %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpbsud xmm22, xmm23, xmm24
|
|
0x62,0x82,0x46,0x00,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbsud xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x46,0x07,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbsud xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x46,0x87,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpbsud ymm22, ymm23, ymm24
|
|
0x62,0x82,0x46,0x20,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbsud ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x46,0x27,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbsud ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x46,0xa7,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpbsud zmm22, zmm23, zmm24
|
|
0x62,0x82,0x46,0x40,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbsud zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x46,0x47,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbsud zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x46,0xc7,0x50,0xf0
|
|
|
|
# ATT: vpdpbsud 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpbsud xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x00,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbsud 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbsud xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x07,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbsud (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpbsud xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x46,0x10,0x50,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbsud -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpbsud xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x46,0x00,0x50,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpbsud 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbsud xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x46,0x87,0x50,0x71,0x7f
|
|
|
|
# ATT: vpdpbsud -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbsud xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x46,0x97,0x50,0x72,0x80
|
|
|
|
# ATT: vpdpbsud 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpbsud ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x20,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbsud 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbsud ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x27,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbsud (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpbsud ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x46,0x30,0x50,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbsud -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpbsud ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x46,0x20,0x50,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpbsud 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbsud ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x46,0xa7,0x50,0x71,0x7f
|
|
|
|
# ATT: vpdpbsud -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbsud ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x46,0xb7,0x50,0x72,0x80
|
|
|
|
# ATT: vpdpbsud 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpbsud zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x40,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbsud 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbsud zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x47,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbsud (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpbsud zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x46,0x50,0x50,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbsud -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpbsud zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x46,0x40,0x50,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpbsud 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbsud zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x46,0xc7,0x50,0x71,0x7f
|
|
|
|
# ATT: vpdpbsud -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbsud zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x46,0xd7,0x50,0x72,0x80
|
|
|
|
# ATT: vpdpbsuds %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpbsuds xmm22, xmm23, xmm24
|
|
0x62,0x82,0x46,0x00,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbsuds xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x46,0x07,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x46,0x87,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpbsuds ymm22, ymm23, ymm24
|
|
0x62,0x82,0x46,0x20,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbsuds ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x46,0x27,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x46,0xa7,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpbsuds zmm22, zmm23, zmm24
|
|
0x62,0x82,0x46,0x40,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbsuds zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x46,0x47,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x46,0xc7,0x51,0xf0
|
|
|
|
# ATT: vpdpbsuds 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpbsuds xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x00,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbsuds 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbsuds xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x07,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbsuds (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpbsuds xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x46,0x10,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbsuds -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpbsuds xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x46,0x00,0x51,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpbsuds 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x46,0x87,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbsuds -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x46,0x97,0x51,0x72,0x80
|
|
|
|
# ATT: vpdpbsuds 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpbsuds ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x20,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbsuds 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbsuds ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x27,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbsuds (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpbsuds ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x46,0x30,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbsuds -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpbsuds ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x46,0x20,0x51,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpbsuds 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x46,0xa7,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbsuds -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x46,0xb7,0x51,0x72,0x80
|
|
|
|
# ATT: vpdpbsuds 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpbsuds zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x40,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbsuds 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbsuds zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x47,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbsuds (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpbsuds zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x46,0x50,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbsuds -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpbsuds zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x46,0x40,0x51,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpbsuds 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x46,0xc7,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbsuds -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbsuds zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x46,0xd7,0x51,0x72,0x80
|
|
|
|
# ATT: vpdpbuud %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpbuud xmm22, xmm23, xmm24
|
|
0x62,0x82,0x44,0x00,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbuud xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x44,0x07,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbuud xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x44,0x87,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpbuud ymm22, ymm23, ymm24
|
|
0x62,0x82,0x44,0x20,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbuud ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x44,0x27,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbuud ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x44,0xa7,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpbuud zmm22, zmm23, zmm24
|
|
0x62,0x82,0x44,0x40,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbuud zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x44,0x47,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbuud zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x44,0xc7,0x50,0xf0
|
|
|
|
# ATT: vpdpbuud 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpbuud xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x00,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbuud 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbuud xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x07,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbuud (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpbuud xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x44,0x10,0x50,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbuud -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpbuud xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x44,0x00,0x50,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpbuud 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbuud xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x44,0x87,0x50,0x71,0x7f
|
|
|
|
# ATT: vpdpbuud -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbuud xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x44,0x97,0x50,0x72,0x80
|
|
|
|
# ATT: vpdpbuud 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpbuud ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x20,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbuud 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbuud ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x27,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbuud (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpbuud ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x44,0x30,0x50,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbuud -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpbuud ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x44,0x20,0x50,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpbuud 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbuud ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x44,0xa7,0x50,0x71,0x7f
|
|
|
|
# ATT: vpdpbuud -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbuud ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x44,0xb7,0x50,0x72,0x80
|
|
|
|
# ATT: vpdpbuud 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpbuud zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x40,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbuud 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbuud zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x47,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbuud (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpbuud zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x44,0x50,0x50,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbuud -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpbuud zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x44,0x40,0x50,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpbuud 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbuud zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x44,0xc7,0x50,0x71,0x7f
|
|
|
|
# ATT: vpdpbuud -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbuud zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x44,0xd7,0x50,0x72,0x80
|
|
|
|
# ATT: vpdpbuuds %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpbuuds xmm22, xmm23, xmm24
|
|
0x62,0x82,0x44,0x00,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbuuds xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x44,0x07,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x44,0x87,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpbuuds ymm22, ymm23, ymm24
|
|
0x62,0x82,0x44,0x20,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbuuds ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x44,0x27,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x44,0xa7,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpbuuds zmm22, zmm23, zmm24
|
|
0x62,0x82,0x44,0x40,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbuuds zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x44,0x47,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x44,0xc7,0x51,0xf0
|
|
|
|
# ATT: vpdpbuuds 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpbuuds xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x00,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbuuds 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpbuuds xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x07,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbuuds (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpbuuds xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x44,0x10,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbuuds -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpbuuds xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x44,0x00,0x51,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpbuuds 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x44,0x87,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbuuds -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x44,0x97,0x51,0x72,0x80
|
|
|
|
# ATT: vpdpbuuds 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpbuuds ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x20,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbuuds 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpbuuds ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x27,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbuuds (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpbuuds ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x44,0x30,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbuuds -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpbuuds ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x44,0x20,0x51,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpbuuds 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x44,0xa7,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbuuds -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x44,0xb7,0x51,0x72,0x80
|
|
|
|
# ATT: vpdpbuuds 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpbuuds zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x40,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpbuuds 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpbuuds zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x47,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpbuuds (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpbuuds zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x44,0x50,0x51,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpbuuds -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpbuuds zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x44,0x40,0x51,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpbuuds 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x44,0xc7,0x51,0x71,0x7f
|
|
|
|
# ATT: vpdpbuuds -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpbuuds zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x44,0xd7,0x51,0x72,0x80
|
|
|
|
# VNNI INT16
|
|
|
|
# ATT: vpdpwsud %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpwsud xmm22, xmm23, xmm24
|
|
0x62,0x82,0x46,0x00,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwsud xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x46,0x07,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwsud xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x46,0x87,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpwsud ymm22, ymm23, ymm24
|
|
0x62,0x82,0x46,0x20,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwsud ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x46,0x27,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwsud ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x46,0xa7,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpwsud zmm22, zmm23, zmm24
|
|
0x62,0x82,0x46,0x40,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwsud zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x46,0x47,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwsud zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x46,0xc7,0xd2,0xf0
|
|
|
|
# ATT: vpdpwsud 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpwsud xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x00,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwsud 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwsud xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x07,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwsud (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpwsud xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x46,0x10,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwsud -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpwsud xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x46,0x00,0xd2,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpwsud 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwsud xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x46,0x87,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwsud -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwsud xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x46,0x97,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwsud 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpwsud ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x20,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwsud 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwsud ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x27,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwsud (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpwsud ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x46,0x30,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwsud -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpwsud ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x46,0x20,0xd2,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpwsud 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwsud ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x46,0xa7,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwsud -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwsud ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x46,0xb7,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwsud 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpwsud zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x40,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwsud 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwsud zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x47,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwsud (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpwsud zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x46,0x50,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwsud -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpwsud zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x46,0x40,0xd2,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpwsud 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwsud zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x46,0xc7,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwsud -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwsud zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x46,0xd7,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwsuds %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpwsuds xmm22, xmm23, xmm24
|
|
0x62,0x82,0x46,0x00,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwsuds xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x46,0x07,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x46,0x87,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpwsuds ymm22, ymm23, ymm24
|
|
0x62,0x82,0x46,0x20,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwsuds ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x46,0x27,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x46,0xa7,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpwsuds zmm22, zmm23, zmm24
|
|
0x62,0x82,0x46,0x40,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwsuds zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x46,0x47,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x46,0xc7,0xd3,0xf0
|
|
|
|
# ATT: vpdpwsuds 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpwsuds xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x00,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwsuds 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwsuds xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x07,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwsuds (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpwsuds xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x46,0x10,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwsuds -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpwsuds xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x46,0x00,0xd3,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpwsuds 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x46,0x87,0xd3,0x71,0x7f
|
|
|
|
# ATT: vpdpwsuds -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x46,0x97,0xd3,0x72,0x80
|
|
|
|
# ATT: vpdpwsuds 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpwsuds ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x20,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwsuds 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwsuds ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x27,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwsuds (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpwsuds ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x46,0x30,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwsuds -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpwsuds ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x46,0x20,0xd3,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpwsuds 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x46,0xa7,0xd3,0x71,0x7f
|
|
|
|
# ATT: vpdpwsuds -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x46,0xb7,0xd3,0x72,0x80
|
|
|
|
# ATT: vpdpwsuds 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpwsuds zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x46,0x40,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwsuds 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwsuds zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x46,0x47,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwsuds (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpwsuds zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x46,0x50,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwsuds -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpwsuds zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x46,0x40,0xd3,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpwsuds 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x46,0xc7,0xd3,0x71,0x7f
|
|
|
|
# ATT: vpdpwsuds -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwsuds zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x46,0xd7,0xd3,0x72,0x80
|
|
|
|
# ATT: vpdpwusd %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpwusd xmm22, xmm23, xmm24
|
|
0x62,0x82,0x45,0x00,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwusd xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x45,0x07,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwusd xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x45,0x87,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpwusd ymm22, ymm23, ymm24
|
|
0x62,0x82,0x45,0x20,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwusd ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x45,0x27,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwusd ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x45,0xa7,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpwusd zmm22, zmm23, zmm24
|
|
0x62,0x82,0x45,0x40,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwusd zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x45,0x47,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwusd zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x45,0xc7,0xd2,0xf0
|
|
|
|
# ATT: vpdpwusd 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpwusd xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x45,0x00,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwusd 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwusd xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x45,0x07,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwusd (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpwusd xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x45,0x10,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwusd -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpwusd xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x45,0x00,0xd2,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpwusd 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwusd xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x45,0x87,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwusd -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwusd xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x45,0x97,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwusd 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpwusd ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x45,0x20,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwusd 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwusd ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x45,0x27,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwusd (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpwusd ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x45,0x30,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwusd -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpwusd ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x45,0x20,0xd2,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpwusd 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwusd ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x45,0xa7,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwusd -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwusd ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x45,0xb7,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwusd 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpwusd zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x45,0x40,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwusd 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwusd zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x45,0x47,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwusd (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpwusd zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x45,0x50,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwusd -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpwusd zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x45,0x40,0xd2,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpwusd 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwusd zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x45,0xc7,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwusd -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwusd zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x45,0xd7,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwusds %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpwusds xmm22, xmm23, xmm24
|
|
0x62,0x82,0x45,0x00,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwusds xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x45,0x07,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwusds xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x45,0x87,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpwusds ymm22, ymm23, ymm24
|
|
0x62,0x82,0x45,0x20,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwusds ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x45,0x27,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwusds ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x45,0xa7,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpwusds zmm22, zmm23, zmm24
|
|
0x62,0x82,0x45,0x40,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwusds zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x45,0x47,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwusds zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x45,0xc7,0xd3,0xf0
|
|
|
|
# ATT: vpdpwusds 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpwusds xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x45,0x00,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwusds 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwusds xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x45,0x07,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwusds (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpwusds xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x45,0x10,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwusds -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpwusds xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x45,0x00,0xd3,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpwusds 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwusds xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x45,0x87,0xd3,0x71,0x7f
|
|
|
|
# ATT: vpdpwusds -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwusds xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x45,0x97,0xd3,0x72,0x80
|
|
|
|
# ATT: vpdpwusds 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpwusds ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x45,0x20,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwusds 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwusds ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x45,0x27,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwusds (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpwusds ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x45,0x30,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwusds -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpwusds ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x45,0x20,0xd3,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpwusds 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwusds ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x45,0xa7,0xd3,0x71,0x7f
|
|
|
|
# ATT: vpdpwusds -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwusds ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x45,0xb7,0xd3,0x72,0x80
|
|
|
|
# ATT: vpdpwusds 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpwusds zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x45,0x40,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwusds 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwusds zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x45,0x47,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwusds (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpwusds zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x45,0x50,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwusds -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpwusds zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x45,0x40,0xd3,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpwusds 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwusds zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x45,0xc7,0xd3,0x71,0x7f
|
|
|
|
# ATT: vpdpwusds -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwusds zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x45,0xd7,0xd3,0x72,0x80
|
|
|
|
# ATT: vpdpwuud %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpwuud xmm22, xmm23, xmm24
|
|
0x62,0x82,0x44,0x00,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwuud xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x44,0x07,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwuud xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x44,0x87,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpwuud ymm22, ymm23, ymm24
|
|
0x62,0x82,0x44,0x20,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwuud ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x44,0x27,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwuud ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x44,0xa7,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpwuud zmm22, zmm23, zmm24
|
|
0x62,0x82,0x44,0x40,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwuud zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x44,0x47,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwuud zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x44,0xc7,0xd2,0xf0
|
|
|
|
# ATT: vpdpwuud 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpwuud xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x00,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwuud 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwuud xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x07,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwuud (%rip){1to4}, %xmm23, %xmm22
|
|
# INTEL: vpdpwuud xmm22, xmm23, dword ptr [rip]{1to4}
|
|
0x62,0xe2,0x44,0x10,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwuud -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vpdpwuud xmm22, xmm23, xmmword ptr [2*rbp - 512]
|
|
0x62,0xe2,0x44,0x00,0xd2,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpwuud 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwuud xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
|
|
0x62,0xe2,0x44,0x87,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwuud -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwuud xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
|
|
0x62,0xe2,0x44,0x97,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwuud 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vpdpwuud ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x20,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwuud 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwuud ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x27,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwuud (%rip){1to8}, %ymm23, %ymm22
|
|
# INTEL: vpdpwuud ymm22, ymm23, dword ptr [rip]{1to8}
|
|
0x62,0xe2,0x44,0x30,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwuud -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vpdpwuud ymm22, ymm23, ymmword ptr [2*rbp - 1024]
|
|
0x62,0xe2,0x44,0x20,0xd2,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vpdpwuud 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwuud ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
|
|
0x62,0xe2,0x44,0xa7,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwuud -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwuud ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x44,0xb7,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwuud 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vpdpwuud zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x40,0xd2,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwuud 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwuud zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
|
|
0x62,0xc2,0x44,0x47,0xd2,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwuud (%rip){1to16}, %zmm23, %zmm22
|
|
# INTEL: vpdpwuud zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x44,0x50,0xd2,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwuud -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vpdpwuud zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x44,0x40,0xd2,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vpdpwuud 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwuud zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x44,0xc7,0xd2,0x71,0x7f
|
|
|
|
# ATT: vpdpwuud -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwuud zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x44,0xd7,0xd2,0x72,0x80
|
|
|
|
# ATT: vpdpwuuds %xmm24, %xmm23, %xmm22
|
|
# INTEL: vpdpwuuds xmm22, xmm23, xmm24
|
|
0x62,0x82,0x44,0x00,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwuuds xmm22 {k7}, xmm23, xmm24
|
|
0x62,0x82,0x44,0x07,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vpdpwuuds xmm22 {k7} {z}, xmm23, xmm24
|
|
0x62,0x82,0x44,0x87,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds %ymm24, %ymm23, %ymm22
|
|
# INTEL: vpdpwuuds ymm22, ymm23, ymm24
|
|
0x62,0x82,0x44,0x20,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vpdpwuuds ymm22 {k7}, ymm23, ymm24
|
|
0x62,0x82,0x44,0x27,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vpdpwuuds ymm22 {k7} {z}, ymm23, ymm24
|
|
0x62,0x82,0x44,0xa7,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds %zmm24, %zmm23, %zmm22
|
|
# INTEL: vpdpwuuds zmm22, zmm23, zmm24
|
|
0x62,0x82,0x44,0x40,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vpdpwuuds zmm22 {k7}, zmm23, zmm24
|
|
0x62,0x82,0x44,0x47,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vpdpwuuds zmm22 {k7} {z}, zmm23, zmm24
|
|
0x62,0x82,0x44,0xc7,0xd3,0xf0
|
|
|
|
# ATT: vpdpwuuds 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vpdpwuuds xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
|
|
0x62,0xa2,0x44,0x00,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vpdpwuuds 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vpdpwuuds xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
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|
0x62,0xc2,0x44,0x07,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vpdpwuuds (%rip){1to4}, %xmm23, %xmm22
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|
# INTEL: vpdpwuuds xmm22, xmm23, dword ptr [rip]{1to4}
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|
0x62,0xe2,0x44,0x10,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
|
# ATT: vpdpwuuds -512(,%rbp,2), %xmm23, %xmm22
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|
# INTEL: vpdpwuuds xmm22, xmm23, xmmword ptr [2*rbp - 512]
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|
0x62,0xe2,0x44,0x00,0xd3,0x34,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vpdpwuuds 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
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# INTEL: vpdpwuuds xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
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|
0x62,0xe2,0x44,0x87,0xd3,0x71,0x7f
|
|
|
|
# ATT: vpdpwuuds -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
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|
# INTEL: vpdpwuuds xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
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|
0x62,0xe2,0x44,0x97,0xd3,0x72,0x80
|
|
|
|
# ATT: vpdpwuuds 268435456(%rbp,%r14,8), %ymm23, %ymm22
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# INTEL: vpdpwuuds ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
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|
0x62,0xa2,0x44,0x20,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
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# ATT: vpdpwuuds 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
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# INTEL: vpdpwuuds ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
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|
0x62,0xc2,0x44,0x27,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
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|
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# ATT: vpdpwuuds (%rip){1to8}, %ymm23, %ymm22
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# INTEL: vpdpwuuds ymm22, ymm23, dword ptr [rip]{1to8}
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|
0x62,0xe2,0x44,0x30,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
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# ATT: vpdpwuuds -1024(,%rbp,2), %ymm23, %ymm22
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# INTEL: vpdpwuuds ymm22, ymm23, ymmword ptr [2*rbp - 1024]
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0x62,0xe2,0x44,0x20,0xd3,0x34,0x6d,0x00,0xfc,0xff,0xff
|
|
|
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# ATT: vpdpwuuds 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
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# INTEL: vpdpwuuds ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
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0x62,0xe2,0x44,0xa7,0xd3,0x71,0x7f
|
|
|
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# ATT: vpdpwuuds -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
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# INTEL: vpdpwuuds ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
|
|
0x62,0xe2,0x44,0xb7,0xd3,0x72,0x80
|
|
|
|
# ATT: vpdpwuuds 268435456(%rbp,%r14,8), %zmm23, %zmm22
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# INTEL: vpdpwuuds zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
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|
0x62,0xa2,0x44,0x40,0xd3,0xb4,0xf5,0x00,0x00,0x00,0x10
|
|
|
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# ATT: vpdpwuuds 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
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# INTEL: vpdpwuuds zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
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|
0x62,0xc2,0x44,0x47,0xd3,0xb4,0x80,0x23,0x01,0x00,0x00
|
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|
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# ATT: vpdpwuuds (%rip){1to16}, %zmm23, %zmm22
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# INTEL: vpdpwuuds zmm22, zmm23, dword ptr [rip]{1to16}
|
|
0x62,0xe2,0x44,0x50,0xd3,0x35,0x00,0x00,0x00,0x00
|
|
|
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# ATT: vpdpwuuds -2048(,%rbp,2), %zmm23, %zmm22
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# INTEL: vpdpwuuds zmm22, zmm23, zmmword ptr [2*rbp - 2048]
|
|
0x62,0xe2,0x44,0x40,0xd3,0x34,0x6d,0x00,0xf8,0xff,0xff
|
|
|
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# ATT: vpdpwuuds 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
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# INTEL: vpdpwuuds zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
|
|
0x62,0xe2,0x44,0xc7,0xd3,0x71,0x7f
|
|
|
|
# ATT: vpdpwuuds -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
|
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# INTEL: vpdpwuuds zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
|
|
0x62,0xe2,0x44,0xd7,0xd3,0x72,0x80
|
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|
|
# VMPSADBW
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# ATT: vmpsadbw $123, %xmm24, %xmm23, %xmm22
|
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# INTEL: vmpsadbw xmm22, xmm23, xmm24, 123
|
|
0x62,0x83,0x46,0x00,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, %xmm24, %xmm23, %xmm22 {%k7}
|
|
# INTEL: vmpsadbw xmm22 {k7}, xmm23, xmm24, 123
|
|
0x62,0x83,0x46,0x07,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, %xmm24, %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vmpsadbw xmm22 {k7} {z}, xmm23, xmm24, 123
|
|
0x62,0x83,0x46,0x87,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, %ymm24, %ymm23, %ymm22
|
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# INTEL: vmpsadbw ymm22, ymm23, ymm24, 123
|
|
0x62,0x83,0x46,0x20,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, %ymm24, %ymm23, %ymm22 {%k7}
|
|
# INTEL: vmpsadbw ymm22 {k7}, ymm23, ymm24, 123
|
|
0x62,0x83,0x46,0x27,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, %ymm24, %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vmpsadbw ymm22 {k7} {z}, ymm23, ymm24, 123
|
|
0x62,0x83,0x46,0xa7,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, %zmm24, %zmm23, %zmm22
|
|
# INTEL: vmpsadbw zmm22, zmm23, zmm24, 123
|
|
0x62,0x83,0x46,0x40,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, %zmm24, %zmm23, %zmm22 {%k7}
|
|
# INTEL: vmpsadbw zmm22 {k7}, zmm23, zmm24, 123
|
|
0x62,0x83,0x46,0x47,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, %zmm24, %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vmpsadbw zmm22 {k7} {z}, zmm23, zmm24, 123
|
|
0x62,0x83,0x46,0xc7,0x42,0xf0,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 268435456(%rbp,%r14,8), %xmm23, %xmm22
|
|
# INTEL: vmpsadbw xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456], 123
|
|
0x62,0xa3,0x46,0x00,0x42,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
|
|
# INTEL: vmpsadbw xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291], 123
|
|
0x62,0xc3,0x46,0x07,0x42,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
|
|
|
|
# ATT: vmpsadbw $123, (%rip), %xmm23, %xmm22
|
|
# INTEL: vmpsadbw xmm22, xmm23, xmmword ptr [rip], 123
|
|
0x62,0xe3,0x46,0x00,0x42,0x35,0x00,0x00,0x00,0x00,0x7b
|
|
|
|
# ATT: vmpsadbw $123, -512(,%rbp,2), %xmm23, %xmm22
|
|
# INTEL: vmpsadbw xmm22, xmm23, xmmword ptr [2*rbp - 512], 123
|
|
0x62,0xe3,0x46,0x00,0x42,0x34,0x6d,0x00,0xfe,0xff,0xff,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vmpsadbw xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032], 123
|
|
0x62,0xe3,0x46,0x87,0x42,0x71,0x7f,0x7b
|
|
|
|
# ATT: vmpsadbw $123, -2048(%rdx), %xmm23, %xmm22 {%k7} {z}
|
|
# INTEL: vmpsadbw xmm22 {k7} {z}, xmm23, xmmword ptr [rdx - 2048], 123
|
|
0x62,0xe3,0x46,0x87,0x42,0x72,0x80,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 268435456(%rbp,%r14,8), %ymm23, %ymm22
|
|
# INTEL: vmpsadbw ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456], 123
|
|
0x62,0xa3,0x46,0x20,0x42,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
|
|
# INTEL: vmpsadbw ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291], 123
|
|
0x62,0xc3,0x46,0x27,0x42,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
|
|
|
|
# ATT: vmpsadbw $123, (%rip), %ymm23, %ymm22
|
|
# INTEL: vmpsadbw ymm22, ymm23, ymmword ptr [rip], 123
|
|
0x62,0xe3,0x46,0x20,0x42,0x35,0x00,0x00,0x00,0x00,0x7b
|
|
|
|
# ATT: vmpsadbw $123, -1024(,%rbp,2), %ymm23, %ymm22
|
|
# INTEL: vmpsadbw ymm22, ymm23, ymmword ptr [2*rbp - 1024], 123
|
|
0x62,0xe3,0x46,0x20,0x42,0x34,0x6d,0x00,0xfc,0xff,0xff,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vmpsadbw ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064], 123
|
|
0x62,0xe3,0x46,0xa7,0x42,0x71,0x7f,0x7b
|
|
|
|
# ATT: vmpsadbw $123, -4096(%rdx), %ymm23, %ymm22 {%k7} {z}
|
|
# INTEL: vmpsadbw ymm22 {k7} {z}, ymm23, ymmword ptr [rdx - 4096], 123
|
|
0x62,0xe3,0x46,0xa7,0x42,0x72,0x80,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 268435456(%rbp,%r14,8), %zmm23, %zmm22
|
|
# INTEL: vmpsadbw zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456], 123
|
|
0x62,0xa3,0x46,0x40,0x42,0xb4,0xf5,0x00,0x00,0x00,0x10,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
|
|
# INTEL: vmpsadbw zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291], 123
|
|
0x62,0xc3,0x46,0x47,0x42,0xb4,0x80,0x23,0x01,0x00,0x00,0x7b
|
|
|
|
# ATT: vmpsadbw $123, (%rip), %zmm23, %zmm22
|
|
# INTEL: vmpsadbw zmm22, zmm23, zmmword ptr [rip], 123
|
|
0x62,0xe3,0x46,0x40,0x42,0x35,0x00,0x00,0x00,0x00,0x7b
|
|
|
|
# ATT: vmpsadbw $123, -2048(,%rbp,2), %zmm23, %zmm22
|
|
# INTEL: vmpsadbw zmm22, zmm23, zmmword ptr [2*rbp - 2048], 123
|
|
0x62,0xe3,0x46,0x40,0x42,0x34,0x6d,0x00,0xf8,0xff,0xff,0x7b
|
|
|
|
# ATT: vmpsadbw $123, 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vmpsadbw zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128], 123
|
|
0x62,0xe3,0x46,0xc7,0x42,0x71,0x7f,0x7b
|
|
|
|
# ATT: vmpsadbw $123, -8192(%rdx), %zmm23, %zmm22 {%k7} {z}
|
|
# INTEL: vmpsadbw zmm22 {k7} {z}, zmm23, zmmword ptr [rdx - 8192], 123
|
|
0x62,0xe3,0x46,0xc7,0x42,0x72,0x80,0x7b
|