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63 lines
2.0 KiB
Plaintext
63 lines
2.0 KiB
Plaintext
# RUN: llvm-mc -triple=xtensa -mattr=+debug,+density -disassemble %s | FileCheck -check-prefixes=CHECK-DEBUG %s
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# RUN: not llvm-mc -triple=xtensa -disassemble %s 2>&1 | FileCheck --implicit-check-not=warning: -check-prefixes=CHECK-CORE %s
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## Verify that binary code is correctly disassembled with
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## Xtensa debug option enabled. Also verify that dissasembling without
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## Xtensa debug option generates warnings.
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[0x10,0x41,0x00]
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# CHECK-DEBUG: break 1, 1
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# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x2d,0xf1]
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# CHECK-DEBUG: break.n 1
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# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0xe0,0x73,0x00]
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# CHECK-DEBUG: lddr32.p a3
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# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0xf0,0x73,0x00]
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# CHECK-DEBUG: sddr32.p a3
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# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0xec, 0x61]
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#CHECK-DEBUG: xsr a2, icount
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0xed, 0x61]
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#CHECK-DEBUG: xsr a2, icountlevel
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0x60, 0x61]
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#CHECK-DEBUG: xsr a2, ibreakenable
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0x68, 0x61]
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#CHECK-DEBUG: xsr a2, ddr
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0x80, 0x61]
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#CHECK-DEBUG: xsr a2, ibreaka0
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0x81, 0x61]
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#CHECK-DEBUG: xsr a2, ibreaka1
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0x90, 0x61]
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#CHECK-DEBUG: xsr a2, dbreaka0
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0x91, 0x61]
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#CHECK-DEBUG: xsr a2, dbreaka1
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0xa0, 0x61]
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#CHECK-DEBUG: xsr a2, dbreakc0
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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[0x20, 0xa1, 0x61]
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#CHECK-DEBUG: xsr a2, dbreakc1
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#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
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