derek.holloway
7502bf64a4
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178 lines
7.5 KiB
ArmAsm
178 lines
7.5 KiB
ArmAsm
# Instructions that are invalid on R5900
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#
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# R5900 is a MIPS III-based processor with specific limitations:
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# - No 64-bit multiply/divide (DMULT/DMULTU/DDIV/DDIVU)
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# - No LL/SC atomic instructions
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# - No COP3 instructions (LWC3, SWC3, LDC3, SDC3)
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# - No ROUND/TRUNC/CEIL/FLOOR.W.S (uses CVT.W.S instead)
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# - No double-precision FPU (single float only)
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#
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# RUN: not llvm-mc %s -triple=mips64el-unknown-linux -mcpu=r5900 2>%t1
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# RUN: FileCheck %s < %t1
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.set noat
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# =============================================================================
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# MIPS3 64-bit multiply/divide instructions that R5900 does NOT support
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# =============================================================================
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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dmult $4, $5
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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dmultu $6, $7
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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ddiv $zero, $8, $9
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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ddivu $zero, $10, $11
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# =============================================================================
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# LL/SC atomic instructions that R5900 does NOT support
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# =============================================================================
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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ll $4, 0($5)
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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sc $4, 0($5)
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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lld $4, 0($5)
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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scd $4, 0($5)
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# =============================================================================
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# COP3 instructions that R5900 does NOT support
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# =============================================================================
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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lwc3 $4, 0($5)
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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swc3 $4, 0($5)
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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ldc3 $4, 0($5)
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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sdc3 $4, 0($5)
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# =============================================================================
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# Single-precision FP compare instructions that R5900 does NOT support
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# (R5900 only supports c.f.s, c.eq.s, c.olt.s, c.ole.s)
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# =============================================================================
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.un.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.ueq.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.ult.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.ule.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.sf.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.ngle.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.seq.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.ngl.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.lt.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.nge.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.le.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.ngt.s $f4, $f6
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# =============================================================================
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# FPU rounding instructions that R5900 does NOT support
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# (R5900 uses CVT.W.S which always truncates toward zero)
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# =============================================================================
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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round.w.s $f4, $f5
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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trunc.w.s $f6, $f7
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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ceil.w.s $f8, $f9
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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floor.w.s $f10, $f11
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# =============================================================================
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# Double-precision FPU instructions that R5900 does NOT support
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# (R5900 has single-precision FPU only)
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# =============================================================================
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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add.d $f4, $f6, $f8
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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sub.d $f4, $f6, $f8
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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mul.d $f4, $f6, $f8
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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div.d $f4, $f6, $f8
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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abs.d $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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neg.d $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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sqrt.d $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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mov.d $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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cvt.s.d $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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cvt.d.s $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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cvt.d.w $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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cvt.w.d $f4, $f6
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# 64-bit FP load/store
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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ldc1 $f4, 0($5)
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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sdc1 $f4, 0($5)
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# Double-precision comparisons
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.eq.d $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.lt.d $f4, $f6
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# CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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c.le.d $f4, $f6
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