derek.holloway
7502bf64a4
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206 lines
5.9 KiB
ArmAsm
206 lines
5.9 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv64 -mattr=+d,+zfh,+zfbfmin -M no-aliases \
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# RUN: | FileCheck -check-prefixes=CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+d,+zfh,+zfbfmin \
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# RUN: | FileCheck -check-prefixes=CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+d,+zfh,+zfbfmin < %s \
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# RUN: | llvm-objdump -M no-aliases --mattr=+d,+zfh,+zfbfmin -d -r - \
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# RUN: | FileCheck -check-prefixes=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+d,+zfh,+zfbfmin < %s \
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# RUN: | llvm-objdump --mattr=+d,+zfh,+zfbfmin -d -r - \
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# RUN: | FileCheck -check-prefixes=CHECK-ALIAS %s
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# This test aims to check what the default rounding mode is for a given
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# instruction if it's not specified, and ensures that it isn't printed when
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# aliases are enabled but is printed otherwise. Instructions aren't listed
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# exhaustively, but special attention is given to the fcvt instructions given
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# that those that never round often default to frm=0b000 for historical
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# reasons.
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# F instructions
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# CHECK-INST: fmadd.s fa0, fa1, fa2, fa3, dyn{{$}}
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# CHECK-ALIAS: fmadd.s fa0, fa1, fa2, fa3{{$}}
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fmadd.s fa0, fa1, fa2, fa3
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# CHECK-INST: fadd.s fa0, fa1, fa2, dyn{{$}}
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# CHECK-ALIAS: fadd.s fa0, fa1, fa2{{$}}
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fadd.s fa0, fa1, fa2
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# CHECK-INST: fcvt.w.s a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.w.s a0, fa0{{$}}
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fcvt.w.s a0, fa0
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# CHECK-INST: fcvt.wu.s a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.wu.s a0, fa0{{$}}
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fcvt.wu.s a0, fa0
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# CHECK-INST: fcvt.s.w fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.w fa0, a0{{$}}
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fcvt.s.w fa0, a0
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# CHECK-INST: fcvt.s.wu fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.wu fa0, a0{{$}}
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fcvt.s.wu fa0, a0
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# CHECK-INST: fcvt.l.s a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.l.s a0, fa0{{$}}
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fcvt.l.s a0, fa0
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# CHECK-INST: fcvt.lu.s a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.lu.s a0, fa0{{$}}
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fcvt.lu.s a0, fa0
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# CHECK-INST: fcvt.s.l fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.l fa0, a0{{$}}
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fcvt.s.l fa0, a0
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# CHECK-INST: fcvt.s.lu fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.lu fa0, a0{{$}}
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fcvt.s.lu fa0, a0
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# D instructions
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# CHECK-INST: fmadd.d fa0, fa1, fa2, fa3, dyn{{$}}
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# CHECK-ALIAS: fmadd.d fa0, fa1, fa2, fa3{{$}}
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fmadd.d fa0, fa1, fa2, fa3
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# CHECK-INST: fadd.d fa0, fa1, fa2, dyn{{$}}
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# CHECK-ALIAS: fadd.d fa0, fa1, fa2{{$}}
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fadd.d fa0, fa1, fa2
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# CHECK-INST: fcvt.s.d fa0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.d fa0, fa0{{$}}
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fcvt.s.d fa0, fa0
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.d.s fa0, fa0{{$}}
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# CHECK-ALIAS: fcvt.d.s fa0, fa0{{$}}
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fcvt.d.s fa0, fa0
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# CHECK-INST: fcvt.d.s fa0, fa0{{$}}
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# CHECK-ALIAS: fcvt.d.s fa0, fa0{{$}}
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fcvt.d.s fa0, fa0, rne
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# CHECK-INST: fcvt.w.d a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.w.d a0, fa0{{$}}
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fcvt.w.d a0, fa0
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# CHECK-INST: fcvt.wu.d a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.wu.d a0, fa0{{$}}
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fcvt.wu.d a0, fa0
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.d.w fa0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.w fa0, a0{{$}}
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fcvt.d.w fa0, a0
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# CHECK-INST: fcvt.d.w fa0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.w fa0, a0{{$}}
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fcvt.d.w fa0, a0, rne
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.d.wu fa0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.wu fa0, a0{{$}}
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fcvt.d.wu fa0, a0
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# CHECK-INST: fcvt.d.wu fa0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.wu fa0, a0{{$}}
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fcvt.d.wu fa0, a0, rne
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# CHECK-INST: fcvt.l.d a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.l.d a0, fa0{{$}}
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fcvt.l.d a0, fa0
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# CHECK-INST: fcvt.lu.d a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.lu.d a0, fa0{{$}}
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fcvt.lu.d a0, fa0
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# CHECK-INST: fcvt.d.l fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.d.l fa0, a0{{$}}
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fcvt.d.l fa0, a0
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# CHECK-INST: fcvt.d.lu fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.d.lu fa0, a0{{$}}
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fcvt.d.lu fa0, a0
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# Zfh instructions
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# CHECK-INST: fmadd.h fa0, fa1, fa2, fa3, dyn{{$}}
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# CHECK-ALIAS: fmadd.h fa0, fa1, fa2, fa3{{$}}
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fmadd.h fa0, fa1, fa2, fa3
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# CHECK-INST: fadd.h fa0, fa1, fa2, dyn{{$}}
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# CHECK-ALIAS: fadd.h fa0, fa1, fa2{{$}}
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fadd.h fa0, fa1, fa2
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.s.h fa0, fa0{{$}}
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# CHECK-ALIAS: fcvt.s.h fa0, fa0{{$}}
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fcvt.s.h fa0, fa0
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# CHECK-INST: fcvt.s.h fa0, fa0{{$}}
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# CHECK-ALIAS: fcvt.s.h fa0, fa0{{$}}
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fcvt.s.h fa0, fa0, rne
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# CHECK-INST: fcvt.h.s fa0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.s fa0, fa0{{$}}
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fcvt.h.s fa0, fa0
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.d.h fa0, fa0{{$}}
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# CHECK-ALIAS: fcvt.d.h fa0, fa0{{$}}
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fcvt.d.h fa0, fa0
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# CHECK-INST: fcvt.d.h fa0, fa0{{$}}
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# CHECK-ALIAS: fcvt.d.h fa0, fa0{{$}}
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fcvt.d.h fa0, fa0, rne
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# CHECK-INST: fcvt.h.d fa0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.d fa0, fa0{{$}}
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fcvt.h.d fa0, fa0
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# CHECK-INST: fcvt.w.h a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.w.h a0, fa0{{$}}
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fcvt.w.h a0, fa0
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# CHECK-INST: fcvt.wu.h a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.wu.h a0, fa0{{$}}
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fcvt.wu.h a0, fa0
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# CHECK-INST: fcvt.h.w fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.w fa0, a0{{$}}
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fcvt.h.w fa0, a0
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# CHECK-INST: fcvt.h.wu fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.wu fa0, a0{{$}}
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fcvt.h.wu fa0, a0
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# CHECK-INST: fcvt.l.h a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.l.h a0, fa0{{$}}
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fcvt.l.h a0, fa0
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# CHECK-INST: fcvt.lu.h a0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.lu.h a0, fa0{{$}}
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fcvt.lu.h a0, fa0
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# CHECK-INST: fcvt.h.l fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.l fa0, a0{{$}}
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fcvt.h.l fa0, a0
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# CHECK-INST: fcvt.h.lu fa0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.lu fa0, a0{{$}}
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fcvt.h.lu fa0, a0
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# Zfbfmin instructions
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# CHECK-INST: fcvt.s.bf16 fa0, fa0{{$}}
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# CHECK-ALIAS: fcvt.s.bf16 fa0, fa0{{$}}
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fcvt.s.bf16 fa0, fa0
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# CHECK-INST: fcvt.s.bf16 fa0, fa0{{$}}
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# CHECK-ALIAS: fcvt.s.bf16 fa0, fa0{{$}}
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fcvt.s.bf16 fa0, fa0, rne
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# CHECK-INST: fcvt.bf16.s fa0, fa0, dyn{{$}}
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# CHECK-ALIAS: fcvt.bf16.s fa0, fa0{{$}}
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fcvt.bf16.s fa0, fa0
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