derek.holloway
7502bf64a4
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196 lines
5.4 KiB
ArmAsm
196 lines
5.4 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv64 -mattr=+zdinx,+zhinx -M no-aliases \
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# RUN: | FileCheck -check-prefixes=CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+zdinx,+zhinx \
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# RUN: | FileCheck -check-prefixes=CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zdinx,+zhinx < %s \
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# RUN: | llvm-objdump -M no-aliases --mattr=+zdinx,+zhinx -d -r - \
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# RUN: | FileCheck -check-prefixes=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zdinx,+zhinx < %s \
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# RUN: | llvm-objdump --mattr=+zdinx,+zhinx -d -r - \
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# RUN: | FileCheck -check-prefixes=CHECK-ALIAS %s
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# This test aims to check what the default rounding mode is for a given
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# instruction if it's not specified, and ensures that it isn't printed when
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# aliases are enabled but is printed otherwise. Instructions aren't listed
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# exhaustively, but special attention is given to the fcvt instructions given
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# that those that never round often default to frm=0b000 for historical
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# reasons.
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#
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# These test cases are copied from fp-default-round-mode.s, but changed to use
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# GPRs.
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# Zfinx instructions
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# CHECK-INST: fmadd.s a0, a1, a2, a3, dyn{{$}}
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# CHECK-ALIAS: fmadd.s a0, a1, a2, a3{{$}}
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fmadd.s a0, a1, a2, a3
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# CHECK-INST: fadd.s a0, a1, a2, dyn{{$}}
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# CHECK-ALIAS: fadd.s a0, a1, a2{{$}}
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fadd.s a0, a1, a2
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# CHECK-INST: fcvt.w.s a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.w.s a0, a0{{$}}
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fcvt.w.s a0, a0
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# CHECK-INST: fcvt.wu.s a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.wu.s a0, a0{{$}}
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fcvt.wu.s a0, a0
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# CHECK-INST: fcvt.s.w a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.w a0, a0{{$}}
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fcvt.s.w a0, a0
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# CHECK-INST: fcvt.s.wu a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.wu a0, a0{{$}}
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fcvt.s.wu a0, a0
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# CHECK-INST: fcvt.l.s a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.l.s a0, a0{{$}}
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fcvt.l.s a0, a0
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# CHECK-INST: fcvt.lu.s a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.lu.s a0, a0{{$}}
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fcvt.lu.s a0, a0
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# CHECK-INST: fcvt.s.l a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.l a0, a0{{$}}
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fcvt.s.l a0, a0
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# CHECK-INST: fcvt.s.lu a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.lu a0, a0{{$}}
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fcvt.s.lu a0, a0
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# Zdinx instructions
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# CHECK-INST: fmadd.d a0, a1, a2, a3, dyn{{$}}
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# CHECK-ALIAS: fmadd.d a0, a1, a2, a3{{$}}
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fmadd.d a0, a1, a2, a3
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# CHECK-INST: fadd.d a0, a1, a2, dyn{{$}}
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# CHECK-ALIAS: fadd.d a0, a1, a2{{$}}
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fadd.d a0, a1, a2
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# CHECK-INST: fcvt.s.d a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.s.d a0, a0{{$}}
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fcvt.s.d a0, a0
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.d.s a0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.s a0, a0{{$}}
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fcvt.d.s a0, a0
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# CHECK-INST: fcvt.d.s a0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.s a0, a0{{$}}
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fcvt.d.s a0, a0, rne
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# CHECK-INST: fcvt.w.d a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.w.d a0, a0{{$}}
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fcvt.w.d a0, a0
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# CHECK-INST: fcvt.wu.d a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.wu.d a0, a0{{$}}
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fcvt.wu.d a0, a0
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.d.w a0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.w a0, a0{{$}}
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fcvt.d.w a0, a0
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# CHECK-INST: fcvt.d.w a0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.w a0, a0{{$}}
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fcvt.d.w a0, a0, rne
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.d.wu a0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.wu a0, a0{{$}}
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fcvt.d.wu a0, a0
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# CHECK-INST: fcvt.d.wu a0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.wu a0, a0{{$}}
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fcvt.d.wu a0, a0, rne
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# CHECK-INST: fcvt.l.d a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.l.d a0, a0{{$}}
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fcvt.l.d a0, a0
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# CHECK-INST: fcvt.lu.d a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.lu.d a0, a0{{$}}
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fcvt.lu.d a0, a0
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# CHECK-INST: fcvt.d.l a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.d.l a0, a0{{$}}
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fcvt.d.l a0, a0
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# CHECK-INST: fcvt.d.lu a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.d.lu a0, a0{{$}}
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fcvt.d.lu a0, a0
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# Zhinx instructions
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# CHECK-INST: fmadd.h a0, a1, a2, a3, dyn{{$}}
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# CHECK-ALIAS: fmadd.h a0, a1, a2, a3{{$}}
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fmadd.h a0, a1, a2, a3
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# CHECK-INST: fadd.h a0, a1, a2, dyn{{$}}
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# CHECK-ALIAS: fadd.h a0, a1, a2{{$}}
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fadd.h a0, a1, a2
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.s.h a0, a0{{$}}
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# CHECK-ALIAS: fcvt.s.h a0, a0{{$}}
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fcvt.s.h a0, a0
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# CHECK-INST: fcvt.s.h a0, a0{{$}}
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# CHECK-ALIAS: fcvt.s.h a0, a0{{$}}
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fcvt.s.h a0, a0, rne
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# CHECK-INST: fcvt.h.s a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.s a0, a0{{$}}
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fcvt.h.s a0, a0
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# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
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# default rounding mode.
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# CHECK-INST: fcvt.d.h a0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.h a0, a0{{$}}
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fcvt.d.h a0, a0
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# CHECK-INST: fcvt.d.h a0, a0{{$}}
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# CHECK-ALIAS: fcvt.d.h a0, a0{{$}}
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fcvt.d.h a0, a0, rne
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# CHECK-INST: fcvt.h.d a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.d a0, a0{{$}}
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fcvt.h.d a0, a0
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# CHECK-INST: fcvt.w.h a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.w.h a0, a0{{$}}
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fcvt.w.h a0, a0
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# CHECK-INST: fcvt.wu.h a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.wu.h a0, a0{{$}}
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fcvt.wu.h a0, a0
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# CHECK-INST: fcvt.h.w a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.w a0, a0{{$}}
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fcvt.h.w a0, a0
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# CHECK-INST: fcvt.h.wu a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.wu a0, a0{{$}}
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fcvt.h.wu a0, a0
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# CHECK-INST: fcvt.l.h a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.l.h a0, a0{{$}}
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fcvt.l.h a0, a0
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# CHECK-INST: fcvt.lu.h a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.lu.h a0, a0{{$}}
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fcvt.lu.h a0, a0
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# CHECK-INST: fcvt.h.l a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.l a0, a0{{$}}
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fcvt.h.l a0, a0
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# CHECK-INST: fcvt.h.lu a0, a0, dyn{{$}}
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# CHECK-ALIAS: fcvt.h.lu a0, a0{{$}}
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fcvt.h.lu a0, a0
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