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37 lines
1.4 KiB
ArmAsm
37 lines
1.4 KiB
ArmAsm
# RUN: llvm-mc -triple=riscv32 -filetype=obj %s | llvm-readelf -Ss - | FileCheck %s --check-prefix=CHECK,CHECK-RV32
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# RUN: llvm-mc -triple=riscv64 -filetype=obj %s | llvm-readelf -Ss - | FileCheck %s --check-prefix=CHECK,CHECK-RV64
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.text
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nop
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# .wibble should *not* inherit .text's mapping symbol. It's a completely
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# different section.
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.section .wibble
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nop
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# A section should be able to start with a $d.
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.section .starts_data
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.word 42
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# Changing back to .text should not emit a redundant $x - the active ISA
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# has not changed since the last mapping symbol emitted in .text.
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.text
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nop
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# With all those constraints, we want:
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# + .text to have $x<ISA> at 0 and no others
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# + .wibble to have $x<ISA> at 0 (each code section records the active ISA
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# + .starts_data to have $d at 0
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## Capture section indices.
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# CHECK: [[#TEXT:]]] .text
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# CHECK: [[#WIBBLE:]]] .wibble
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# CHECK: [[#STARTS_DATA:]]] .starts_data
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# CHECK: Value Size Type Bind Vis Ndx Name
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# CHECK-RV32: 00000000 0 NOTYPE LOCAL DEFAULT [[#TEXT]] $xrv32i2p1{{$}}
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# CHECK-RV64: 00000000 0 NOTYPE LOCAL DEFAULT [[#TEXT]] $xrv64i2p1{{$}}
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# CHECK-RV32: 00000000 0 NOTYPE LOCAL DEFAULT [[#WIBBLE]] $xrv32i2p1{{$}}
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# CHECK-RV64: 00000000 0 NOTYPE LOCAL DEFAULT [[#WIBBLE]] $xrv64i2p1{{$}}
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# CHECK: 00000000 0 NOTYPE LOCAL DEFAULT [[#STARTS_DATA]] $d{{$}}
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