derek.holloway
7502bf64a4
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134 lines
3.4 KiB
ArmAsm
134 lines
3.4 KiB
ArmAsm
# RUN: llvm-mc -triple riscv32 -mattr=+experimental -show-encoding < %s \
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# RUN: | FileCheck -check-prefixes=CHECK %s
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# RUN: llvm-mc -triple riscv32 -mattr=+experimental -filetype=obj < %s \
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# RUN: | llvm-objdump --triple=riscv32 --mattr=+c,+m,+a,+f,+zba,+experimental-zicfiss -d -M no-aliases - \
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# RUN: | FileCheck -check-prefixes=CHECK-INST %s
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# Test '.option arch, +' and '.option arch, -' directive
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# The following test cases were copied from MC/RISCV/option-rvc.s
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# CHECK-INST: addi a0, a1, 0x0
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# CHECK: # encoding: [0x13,0x85,0x05,0x00]
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addi a0, a1, 0
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# CHECK-INST: addi s0, sp, 0x3fc
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# CHECK: # encoding: [0x13,0x04,0xc1,0x3f]
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addi s0, sp, 1020
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# CHECK: .option arch, +c
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.option arch, +c
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# CHECK-INST: c.mv a0, a1
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# CHECK: # encoding: [0x2e,0x85]
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addi a0, a1, 0
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# CHECK-INST: c.addi4spn s0, sp, 0x3fc
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# CHECK: # encoding: [0xe0,0x1f]
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addi s0, sp, 1020
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# CHECK: .option arch, -c, -zca
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.option arch, -c, -zca
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# CHECK-INST: addi a0, a1, 0x0
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# CHECK: # encoding: [0x13,0x85,0x05,0x00]
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addi a0, a1, 0
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# CHECK-INST: addi s0, sp, 0x3fc
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# CHECK: # encoding: [0x13,0x04,0xc1,0x3f]
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addi s0, sp, 1020
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# CHECK: .option arch, +c
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.option arch, +c
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# CHECK-INST: c.mv a0, a1
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# CHECK: # encoding: [0x2e,0x85]
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addi a0, a1, 0
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# CHECK-INST: c.addi4spn s0, sp, 0x3fc
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# CHECK: # encoding: [0xe0,0x1f]
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addi s0, sp, 1020
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# CHECK: .option arch, -c, -zca
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.option arch, -c, -zca
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# CHECK-INST: addi a0, a1, 0x0
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# CHECK: # encoding: [0x13,0x85,0x05,0x00]
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addi a0, a1, 0
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# CHECK-INST: addi s0, sp, 0x3fc
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# CHECK: # encoding: [0x13,0x04,0xc1,0x3f]
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addi s0, sp, 1020
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# CHECK: .option arch, +d, -d
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.option arch, +d, -d
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# CHECK-INST: flw ft0, 0xc(a0)
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# CHECK: # encoding: [0x07,0x20,0xc5,0x00]
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flw f0, 12(a0)
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# Test comma-separated list
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# CHECK: arch, +m, +a
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.option arch, +m, +a
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# CHECK-INST: mul a4, ra, s0
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# CHECK: # encoding: [0x33,0x87,0x80,0x02]
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mul a4, ra, s0
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# CHECK-INST: lr.w t0, (t1)
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# CHECK: # encoding: [0xaf,0x22,0x03,0x10]
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lr.w t0, (t1)
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# Test multi-letter extension
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# CHECK: .option arch, +zba
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.option arch, +zba
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# CHECK-INST: sh1add t0, t1, t2
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# CHECK: encoding: [0xb3,0x22,0x73,0x20]
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sh1add t0, t1, t2
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# Test experimental extension
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# CHECK: .option arch, +zicfiss
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.option arch, +zicfiss
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# CHECK-INST: sspopchk ra
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# CHECK: encoding: [0x73,0xc0,0xc0,0xcd]
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sspopchk ra
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# Test '.option arch, <arch-string>' directive
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# CHECK: .option arch, rv32i2p1_m2p0_a2p1_c2p0
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.option arch, rv32i2p1_m2p0_a2p1_c2p0
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# CHECK-INST: mul a4, ra, s0
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# CHECK: # encoding: [0x33,0x87,0x80,0x02]
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mul a4, ra, s0
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# CHECK-INST: lr.w t0, (t1)
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# CHECK: # encoding: [0xaf,0x22,0x03,0x10]
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lr.w t0, (t1)
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# Test arch string without version number
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# CHECK: .option arch, rv32i2p1_m2p0_a2p1_c2p0
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.option arch, rv32imac
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# CHECK-INST: mul a4, ra, s0
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# CHECK: # encoding: [0x33,0x87,0x80,0x02]
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mul a4, ra, s0
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# CHECK-INST: lr.w t0, (t1)
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# CHECK: # encoding: [0xaf,0x22,0x03,0x10]
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lr.w t0, (t1)
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# Test +c, -c and vice-versa
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.option arch, +c, -c, -zca
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# CHECK-INST: addi a0, a1, 0x0
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# CHECK: # encoding: [0x13,0x85,0x05,0x00]
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addi a0, a1, 0
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.option arch, -c, -zca, +c
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# CHECK-INST: c.mv a0, a1
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# CHECK: # encoding: [0x2e,0x85]
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addi a0, a1, 0
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.option arch, rv32ic
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# CHECK-INST: c.mv a0, a1
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# CHECK: # encoding: [0x2e,0x85]
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addi a0, a1, 0
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# Test extension name that has digits.
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.option arch, +zve32x
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# CHECK: .option arch, +zve32x
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.option arch, rv32i
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.option arch, +zce, +f
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# CHECK-INST: flw fa0, 0x0(a0)
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# CHECK: # encoding: [0x08,0x61]
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c.flw fa0, 0(a0)
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