derek.holloway
7502bf64a4
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96 lines
3.1 KiB
ArmAsm
96 lines
3.1 KiB
ArmAsm
# RUN: llvm-mc -triple riscv64-unknown-linux-gnu -filetype obj %s -o %t
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# RUN: llvm-readobj -r %t | FileCheck %s
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# RUN: llvm-objdump -s %t | FileCheck %s --check-prefix=CONTENT
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# CHECK: Relocations [
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# CHECK-NEXT: Section ({{.*}}) .rela.note {
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# CHECK-NEXT: 0x0 R_RISCV_ADD64 extern 0x0
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# CHECK-NEXT: 0x0 R_RISCV_SUB64 note 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: Section ({{.*}}) .rela.rodata {
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# CHECK-NEXT: 0x0 R_RISCV_ADD64 extern 0x0
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# CHECK-NEXT: 0x0 R_RISCV_SUB64 rodata 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: Section ({{.*}}) .rela.alloc_w {
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# CHECK-NEXT: 0x0 R_RISCV_ADD64 extern 0x0
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# CHECK-NEXT: 0x0 R_RISCV_SUB64 w 0x0
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# CHECK-NEXT: 0x8 R_RISCV_ADD64 w 0x0
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# CHECK-NEXT: 0x8 R_RISCV_SUB64 extern 0x0
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# CHECK-NEXT: 0x10 R_RISCV_ADD32 x 0x0
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# CHECK-NEXT: 0x10 R_RISCV_SUB32 w 0x0
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# CHECK-NEXT: 0x18 R_RISCV_ADD32 .L.str 0x0
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# CHECK-NEXT: 0x18 R_RISCV_SUB32 w 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: Section ({{.*}}) .rela.alloc_x {
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# CHECK-NEXT: 0x0 R_RISCV_ADD64 y 0x0
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# CHECK-NEXT: 0x0 R_RISCV_SUB64 x 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: Section ({{.*}}) .rela.alloc_y {
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# CHECK-NEXT: 0x0 R_RISCV_ADD64 x 0x0
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# CHECK-NEXT: 0x0 R_RISCV_SUB64 y 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: Section ({{.*}}) .rela.nonalloc_w {
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# CHECK-NEXT: 0x0 R_RISCV_ADD64 extern 0x0
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# CHECK-NEXT: 0x0 R_RISCV_SUB64 nw 0x0
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# CHECK-NEXT: 0x8 R_RISCV_ADD64 nw 0x0
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# CHECK-NEXT: 0x8 R_RISCV_SUB64 extern 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: Section ({{.*}}) .rela.nonalloc_x {
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# CHECK-NEXT: 0x0 R_RISCV_ADD64 ny 0x0
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# CHECK-NEXT: 0x0 R_RISCV_SUB64 nx 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: Section ({{.*}}) .rela.nonalloc_y {
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# CHECK-NEXT: 0x0 R_RISCV_ADD64 nx 0x0
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# CHECK-NEXT: 0x0 R_RISCV_SUB64 ny 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CONTENT: Contents of section .alloc_w:
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# CONTENT-NEXT: 0000 00000000 00000000 00000000 00000000
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# CONTENT-NEXT: 0010 00000000 1c000000 00000000
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.section .note,"a",@note; note:
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.quad extern-note
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.section .rodata,"a",@progbits; rodata:
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.quad extern-rodata
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.section .alloc_w,"aw",@progbits; w:
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.quad extern-w # extern is undefined
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.quad w-extern
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.long x-w # A is later defined in another section
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.long w1-w # A is later defined in the same section
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.long .L.str-w # A is temporary
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w1:
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.section .alloc_x,"aw",@progbits; x:
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.quad y-x
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.section .alloc_y,"aw",@progbits; y:
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.quad x-y
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.section .nonalloc_w; nw:
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.quad extern-nw
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.quad nw-extern
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.section .nonalloc_x; nx:
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.quad ny-nx
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.section .nonalloc_y; ny:
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.quad nx-ny
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## -gdwarf-aranges generated assembly expects no relocation.
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## Otherwise, a .Lsec_end0 symbol (defined at the end of .rodata.str1.1)
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## will be rejected by linkers.
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.section .rodata.str1.1,"aMS",@progbits,1
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.L.str:
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.asciz "hello"
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.section .rodata.str1.1,"aMS",@progbits,1
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.Lsec_end0:
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.section .debug_aranges,"",@progbits
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.quad .Lsec_end0-.L.str
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## .apple_names/.apple_types are fixed-size and do not need fixups.
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## llvm-dwarfdump --apple-names does not process R_RISCV_{ADD,SUB}32 in them.
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## See llvm/test/DebugInfo/Generic/accel-table-hash-collisions.ll
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.section .apple_types
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.word 0
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.word .Ltypes0-.apple_types
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.Ltypes0:
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