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23 lines
1.1 KiB
ArmAsm
23 lines
1.1 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv64 -mattr=+m,+zbb,+zba,+zcb -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+m,+zbb,+zba,+zcb < %s \
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# RUN: | llvm-objdump --mattr=+m,+zbb,+zba,zcb -M no-aliases -d -r - \
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# RUN: | FileCheck --check-prefixes=CHECK-ASM-AND-OBJ %s
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#
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# RUN: not llvm-mc -triple riscv64 \
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# RUN: -M no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# RUN: not llvm-mc -triple riscv32 -mattr=+m,+zbb,+zba,+zcb \
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# RUN: -M no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-RV64 %s
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# CHECK-ASM-AND-OBJ: c.zext.w s0
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# CHECK-ASM: encoding: [0x71,0x9c]
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# CHECK-NO-EXT: error: instruction requires the following: 'Zba' (Address Generation Instructions), 'Zcb' (Compressed basic bit manipulation instructions){{$}}
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# CHECK-NO-RV64: error: instruction requires the following: RV64I Base Instruction Set{{$}}
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c.zext.w s0
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# CHECK-ASM-AND-OBJ: c.zext.w s0
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# CHECK-ASM: encoding: [0x71,0x9c]
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add.uw s0, s0, zero
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