derek.holloway
7502bf64a4
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133 lines
5.8 KiB
ArmAsm
133 lines
5.8 KiB
ArmAsm
# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+zve32f %s \
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# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+zve32f %s \
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# RUN: | llvm-objdump -d --mattr=+zve32f - \
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# RUN: | FileCheck %s --check-prefix=CHECK-INST
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vmfeq.vv v8, v4, v20, v0.t
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# CHECK-INST: vmfeq.vv v8, v4, v20, v0.t
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x60]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfeq.vv v8, v4, v20
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# CHECK-INST: vmfeq.vv v8, v4, v20
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x62]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfeq.vf v8, v4, fa0, v0.t
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# CHECK-INST: vmfeq.vf v8, v4, fa0, v0.t
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# CHECK-ENCODING: [0x57,0x54,0x45,0x60]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfeq.vf v8, v4, fa0
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# CHECK-INST: vmfeq.vf v8, v4, fa0
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# CHECK-ENCODING: [0x57,0x54,0x45,0x62]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfne.vv v8, v4, v20, v0.t
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# CHECK-INST: vmfne.vv v8, v4, v20, v0.t
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x70]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfne.vv v8, v4, v20
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# CHECK-INST: vmfne.vv v8, v4, v20
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x72]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfne.vf v8, v4, fa0, v0.t
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# CHECK-INST: vmfne.vf v8, v4, fa0, v0.t
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# CHECK-ENCODING: [0x57,0x54,0x45,0x70]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfne.vf v8, v4, fa0
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# CHECK-INST: vmfne.vf v8, v4, fa0
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# CHECK-ENCODING: [0x57,0x54,0x45,0x72]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmflt.vv v8, v4, v20, v0.t
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# CHECK-INST: vmflt.vv v8, v4, v20, v0.t
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x6c]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmflt.vv v8, v4, v20
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# CHECK-INST: vmflt.vv v8, v4, v20
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x6e]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmflt.vf v8, v4, fa0, v0.t
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# CHECK-INST: vmflt.vf v8, v4, fa0, v0.t
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# CHECK-ENCODING: [0x57,0x54,0x45,0x6c]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmflt.vf v8, v4, fa0
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# CHECK-INST: vmflt.vf v8, v4, fa0
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# CHECK-ENCODING: [0x57,0x54,0x45,0x6e]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfle.vv v8, v4, v20, v0.t
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# CHECK-INST: vmfle.vv v8, v4, v20, v0.t
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x64]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfle.vv v8, v4, v20
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# CHECK-INST: vmfle.vv v8, v4, v20
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x66]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfle.vf v8, v4, fa0, v0.t
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# CHECK-INST: vmfle.vf v8, v4, fa0, v0.t
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# CHECK-ENCODING: [0x57,0x54,0x45,0x64]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfle.vf v8, v4, fa0
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# CHECK-INST: vmfle.vf v8, v4, fa0
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# CHECK-ENCODING: [0x57,0x54,0x45,0x66]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfgt.vf v8, v4, fa0, v0.t
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# CHECK-INST: vmfgt.vf v8, v4, fa0, v0.t
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# CHECK-ENCODING: [0x57,0x54,0x45,0x74]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfgt.vf v8, v4, fa0
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# CHECK-INST: vmfgt.vf v8, v4, fa0
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# CHECK-ENCODING: [0x57,0x54,0x45,0x76]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfge.vf v8, v4, fa0, v0.t
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# CHECK-INST: vmfge.vf v8, v4, fa0, v0.t
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# CHECK-ENCODING: [0x57,0x54,0x45,0x7c]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfge.vf v8, v4, fa0
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# CHECK-INST: vmfge.vf v8, v4, fa0
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# CHECK-ENCODING: [0x57,0x54,0x45,0x7e]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfgt.vv v8, v20, v4, v0.t
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# CHECK-INST: vmflt.vv v8, v4, v20, v0.t
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x6c]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfgt.vv v8, v20, v4
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# CHECK-INST: vmflt.vv v8, v4, v20
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x6e]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfge.vv v8, v20, v4, v0.t
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# CHECK-INST: vmfle.vv v8, v4, v20, v0.t
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x64]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfge.vv v8, v20, v4
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# CHECK-INST: vmfle.vv v8, v4, v20
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# CHECK-ENCODING: [0x57,0x14,0x4a,0x66]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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vmfeq.vv v0, v4, v20, v0.t
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# CHECK-INST: vmfeq.vv v0, v4, v20, v0.t
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# CHECK-ENCODING: [0x57,0x10,0x4a,0x60]
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# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}
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