derek.holloway
7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
113 lines
5.9 KiB
ArmAsm
113 lines
5.9 KiB
ArmAsm
# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+v %s \
|
|
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
|
# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
|
|
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
|
# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+v %s \
|
|
# RUN: | llvm-objdump -d --mattr=+v - \
|
|
# RUN: | FileCheck %s --check-prefix=CHECK-INST
|
|
|
|
vredsum.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vredsum.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x00]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredsum.vs v8, v4, v20
|
|
# CHECK-INST: vredsum.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x02]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredmaxu.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vredmaxu.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x18]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredmaxu.vs v8, v4, v20
|
|
# CHECK-INST: vredmaxu.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x1a]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredmax.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vredmax.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x1c]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredmax.vs v8, v4, v20
|
|
# CHECK-INST: vredmax.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x1e]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredminu.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vredminu.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x10]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredminu.vs v8, v4, v20
|
|
# CHECK-INST: vredminu.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x12]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredmin.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vredmin.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x14]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredmin.vs v8, v4, v20
|
|
# CHECK-INST: vredmin.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x16]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredand.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vredand.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x04]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredand.vs v8, v4, v20
|
|
# CHECK-INST: vredand.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x06]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredor.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vredor.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x08]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredor.vs v8, v4, v20
|
|
# CHECK-INST: vredor.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x0a]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredxor.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vredxor.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x0c]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredxor.vs v8, v4, v20
|
|
# CHECK-INST: vredxor.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x24,0x4a,0x0e]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vwredsumu.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vwredsumu.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x04,0x4a,0xc0]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vwredsumu.vs v8, v4, v20
|
|
# CHECK-INST: vwredsumu.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x04,0x4a,0xc2]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vwredsum.vs v8, v4, v20, v0.t
|
|
# CHECK-INST: vwredsum.vs v8, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x04,0x4a,0xc4]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vwredsum.vs v8, v4, v20
|
|
# CHECK-INST: vwredsum.vs v8, v4, v20
|
|
# CHECK-ENCODING: [0x57,0x04,0x4a,0xc6]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vredsum.vs v0, v4, v20, v0.t
|
|
# CHECK-INST: vredsum.vs v0, v4, v20, v0.t
|
|
# CHECK-ENCODING: [0x57,0x20,0x4a,0x00]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|