CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
218 lines
11 KiB
ArmAsm
218 lines
11 KiB
ArmAsm
# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+v %s \
|
|
# RUN: --M no-aliases | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
|
# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
|
|
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
|
# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+v %s \
|
|
# RUN: | llvm-objdump -d --mattr=+v -M no-aliases - \
|
|
# RUN: | FileCheck %s --check-prefix=CHECK-INST
|
|
|
|
vsm.v v24, (a0)
|
|
# CHECK-INST: vsm.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x0c,0xb5,0x02]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse8.v v24, (a0), v0.t
|
|
# CHECK-INST: vse8.v v24, (a0), v0.t
|
|
# CHECK-ENCODING: [0x27,0x0c,0x05,0x00]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse8.v v24, (a0)
|
|
# CHECK-INST: vse8.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x0c,0x05,0x02]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse16.v v24, (a0), v0.t
|
|
# CHECK-INST: vse16.v v24, (a0), v0.t
|
|
# CHECK-ENCODING: [0x27,0x5c,0x05,0x00]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse16.v v24, (a0)
|
|
# CHECK-INST: vse16.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x5c,0x05,0x02]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse32.v v24, (a0), v0.t
|
|
# CHECK-INST: vse32.v v24, (a0), v0.t
|
|
# CHECK-ENCODING: [0x27,0x6c,0x05,0x00]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse32.v v24, (a0)
|
|
# CHECK-INST: vse32.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x6c,0x05,0x02]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse64.v v24, (a0), v0.t
|
|
# CHECK-INST: vse64.v v24, (a0), v0.t
|
|
# CHECK-ENCODING: [0x27,0x7c,0x05,0x00]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse64.v v24, (a0)
|
|
# CHECK-INST: vse64.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x7c,0x05,0x02]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse8.v v24, (a0), a1, v0.t
|
|
# CHECK-INST: vsse8.v v24, (a0), a1, v0.t
|
|
# CHECK-ENCODING: [0x27,0x0c,0xb5,0x08]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse8.v v24, (a0), a1
|
|
# CHECK-INST: vsse8.v v24, (a0), a1
|
|
# CHECK-ENCODING: [0x27,0x0c,0xb5,0x0a]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse16.v v24, (a0), a1, v0.t
|
|
# CHECK-INST: vsse16.v v24, (a0), a1, v0.t
|
|
# CHECK-ENCODING: [0x27,0x5c,0xb5,0x08]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse16.v v24, (a0), a1
|
|
# CHECK-INST: vsse16.v v24, (a0), a1
|
|
# CHECK-ENCODING: [0x27,0x5c,0xb5,0x0a]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse32.v v24, (a0), a1, v0.t
|
|
# CHECK-INST: vsse32.v v24, (a0), a1, v0.t
|
|
# CHECK-ENCODING: [0x27,0x6c,0xb5,0x08]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse32.v v24, (a0), a1
|
|
# CHECK-INST: vsse32.v v24, (a0), a1
|
|
# CHECK-ENCODING: [0x27,0x6c,0xb5,0x0a]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse64.v v24, (a0), a1, v0.t
|
|
# CHECK-INST: vsse64.v v24, (a0), a1, v0.t
|
|
# CHECK-ENCODING: [0x27,0x7c,0xb5,0x08]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse64.v v24, (a0), a1
|
|
# CHECK-INST: vsse64.v v24, (a0), a1
|
|
# CHECK-ENCODING: [0x27,0x7c,0xb5,0x0a]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei8.v v24, (a0), v4, v0.t
|
|
# CHECK-INST: vsuxei8.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x0c,0x45,0x04]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei8.v v24, (a0), v4
|
|
# CHECK-INST: vsuxei8.v v24, (a0), v4
|
|
# CHECK-ENCODING: [0x27,0x0c,0x45,0x06]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei16.v v24, (a0), v4, v0.t
|
|
# CHECK-INST: vsuxei16.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x5c,0x45,0x04]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei16.v v24, (a0), v4
|
|
# CHECK-INST: vsuxei16.v v24, (a0), v4
|
|
# CHECK-ENCODING: [0x27,0x5c,0x45,0x06]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei32.v v24, (a0), v4, v0.t
|
|
# CHECK-INST: vsuxei32.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x6c,0x45,0x04]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei32.v v24, (a0), v4
|
|
# CHECK-INST: vsuxei32.v v24, (a0), v4
|
|
# CHECK-ENCODING: [0x27,0x6c,0x45,0x06]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei64.v v24, (a0), v4, v0.t
|
|
# CHECK-INST: vsuxei64.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x7c,0x45,0x04]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei64.v v24, (a0), v4
|
|
# CHECK-INST: vsuxei64.v v24, (a0), v4
|
|
# CHECK-ENCODING: [0x27,0x7c,0x45,0x06]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei8.v v24, (a0), v4, v0.t
|
|
# CHECK-INST: vsoxei8.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x0c,0x45,0x0c]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei8.v v24, (a0), v4
|
|
# CHECK-INST: vsoxei8.v v24, (a0), v4
|
|
# CHECK-ENCODING: [0x27,0x0c,0x45,0x0e]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei16.v v24, (a0), v4, v0.t
|
|
# CHECK-INST: vsoxei16.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x5c,0x45,0x0c]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei16.v v24, (a0), v4
|
|
# CHECK-INST: vsoxei16.v v24, (a0), v4
|
|
# CHECK-ENCODING: [0x27,0x5c,0x45,0x0e]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei32.v v24, (a0), v4, v0.t
|
|
# CHECK-INST: vsoxei32.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x6c,0x45,0x0c]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei32.v v24, (a0), v4
|
|
# CHECK-INST: vsoxei32.v v24, (a0), v4
|
|
# CHECK-ENCODING: [0x27,0x6c,0x45,0x0e]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei64.v v24, (a0), v4, v0.t
|
|
# CHECK-INST: vsoxei64.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x7c,0x45,0x0c]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei64.v v24, (a0), v4
|
|
# CHECK-INST: vsoxei64.v v24, (a0), v4
|
|
# CHECK-ENCODING: [0x27,0x7c,0x45,0x0e]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vs1r.v v24, (a0)
|
|
# CHECK-INST: vs1r.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x0c,0x85,0x02]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vs2r.v v24, (a0)
|
|
# CHECK-INST: vs2r.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x0c,0x85,0x22]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vs4r.v v24, (a0)
|
|
# CHECK-INST: vs4r.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x0c,0x85,0x62]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vs8r.v v24, (a0)
|
|
# CHECK-INST: vs8r.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x0c,0x85,0xe2]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsm.v v24, 0(a0)
|
|
# CHECK-INST: vsm.v v24, (a0)
|
|
# CHECK-ENCODING: [0x27,0x0c,0xb5,0x02]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vse8.v v24, 0(a0), v0.t
|
|
# CHECK-INST: vse8.v v24, (a0), v0.t
|
|
# CHECK-ENCODING: [0x27,0x0c,0x05,0x00]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsse16.v v24, 0(a0), a1, v0.t
|
|
# CHECK-INST: vsse16.v v24, (a0), a1, v0.t
|
|
# CHECK-ENCODING: [0x27,0x5c,0xb5,0x08]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsuxei8.v v24, 0(a0), v4, v0.t
|
|
# CHECK-INST: vsuxei8.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x0c,0x45,0x04]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|
|
|
|
vsoxei32.v v24, 0(a0), v4, v0.t
|
|
# CHECK-INST: vsoxei32.v v24, (a0), v4, v0.t
|
|
# CHECK-ENCODING: [0x27,0x6c,0x45,0x0c]
|
|
# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}}
|