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40 lines
1.9 KiB
ArmAsm
40 lines
1.9 KiB
ArmAsm
# XAndesVSIntLoad - Andes Vector INT4 Load Extension
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+xandesvsintload -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+xandesvsintload < %s \
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# RUN: | llvm-objdump --mattr=+xandesvsintload -M no-aliases -d -r - \
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# RUN: | FileCheck -check-prefixes=CHECK-OBJ %s
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# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+xandesvsintload -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+xandesvsintload < %s \
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# RUN: | llvm-objdump --mattr=+xandesvsintload -M no-aliases -d -r - \
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# RUN: | FileCheck -check-prefixes=CHECK-OBJ %s
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# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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# CHECK-OBJ: nds.vln8.v v8, (a0)
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# CHECK-ASM: nds.vln8.v v8, (a0)
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# CHECK-ASM: encoding: [0x5b,0x44,0x25,0x06]
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# CHECK-ERROR: instruction requires the following: 'XAndesVSIntLoad' (Andes Vector INT4 Load Extension){{$}}
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nds.vln8.v v8, (a0)
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# CHECK-OBJ: nds.vln8.v v8, (a0), v0.t
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# CHECK-ASM: nds.vln8.v v8, (a0), v0.t
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# CHECK-ASM: encoding: [0x5b,0x44,0x25,0x04]
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# CHECK-ERROR: instruction requires the following: 'XAndesVSIntLoad' (Andes Vector INT4 Load Extension){{$}}
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nds.vln8.v v8, (a0), v0.t
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# CHECK-OBJ: nds.vlnu8.v v8, (a0)
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# CHECK-ASM: nds.vlnu8.v v8, (a0)
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# CHECK-ASM: encoding: [0x5b,0x44,0x35,0x06]
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# CHECK-ERROR: instruction requires the following: 'XAndesVSIntLoad' (Andes Vector INT4 Load Extension){{$}}
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nds.vlnu8.v v8, (a0)
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# CHECK-OBJ: nds.vlnu8.v v8, (a0), v0.t
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# CHECK-ASM: nds.vlnu8.v v8, (a0), v0.t
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# CHECK-ASM: encoding: [0x5b,0x44,0x35,0x04]
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# CHECK-ERROR: instruction requires the following: 'XAndesVSIntLoad' (Andes Vector INT4 Load Extension){{$}}
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nds.vlnu8.v v8, (a0), v0.t
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