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166 lines
6.1 KiB
ArmAsm
166 lines
6.1 KiB
ArmAsm
# Xqcicm - Qualcomm uC Conditional Move Extension
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# RUN: not llvm-mc -triple riscv32 -mattr=+xqcicm < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-IMM %s
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# RUN: not llvm-mc -triple riscv32 -mattr=-xqcicm < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-EXT %s
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# CHECK-PLUS: :[[@LINE+2]]:12: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:12: error: invalid operand for instruction
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qc.c.mveqz 9, x10
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.c.mveqz x9
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.c.mveqz x9, x10
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# CHECK-PLUS: :[[@LINE+2]]:9: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:9: error: invalid operand for instruction
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qc.mveq 9, x10, x11, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mveq x9
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mveq x9, x10, x11, x12
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# CHECK-PLUS: :[[@LINE+2]]:9: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:9: error: invalid operand for instruction
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qc.mvge 9, x10, x11, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvge x9
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvge x9, x10, x11, x12
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# CHECK-PLUS: :[[@LINE+2]]:10: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:10: error: invalid operand for instruction
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qc.mvgeu 9, x10, x11, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvgeu x9
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvgeu x9, x10, x11, x12
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# CHECK-PLUS: :[[@LINE+2]]:9: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:9: error: invalid operand for instruction
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qc.mvlt 9, x10, x11, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvlt x9
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvlt x9, x10, x11, x12
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# CHECK-PLUS: :[[@LINE+2]]:10: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:10: error: invalid operand for instruction
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qc.mvltu 9, x10, x11, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvltu x9
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvltu x9, x10, x11, x12
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# CHECK-PLUS: :[[@LINE+2]]:9: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:9: error: invalid operand for instruction
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qc.mvne 9, x10, x11, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvne x9
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvne x9, x10, x11, x12
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# CHECK-PLUS: :[[@LINE+2]]:10: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:10: error: invalid operand for instruction
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qc.mveqi 9, x10, 5, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mveqi x9
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# CHECK-IMM: :[[@LINE+1]]:19: error: immediate must be an integer in the range [-16, 15]
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qc.mveqi x9, x10, 17, x12
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mveqi x9, x10, 5, x12
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# CHECK-PLUS: :[[@LINE+2]]:10: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:10: error: invalid operand for instruction
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qc.mvgei 9, x10, 5, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvgei x9
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# CHECK-IMM: :[[@LINE+1]]:19: error: immediate must be an integer in the range [-16, 15]
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qc.mvgei x9, x10, 17, x12
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvgei x9, x10, 5, x12
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# CHECK-PLUS: :[[@LINE+2]]:10: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:10: error: invalid operand for instruction
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qc.mvlti 9, x10, 5, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvlti x9
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# CHECK-IMM: :[[@LINE+1]]:19: error: immediate must be an integer in the range [-16, 15]
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qc.mvlti x9, x10, 17, x12
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvlti x9, x10, 5, x12
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# CHECK-PLUS: :[[@LINE+2]]:10: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:10: error: invalid operand for instruction
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qc.mvnei 9, x10, 5, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvnei x9
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# CHECK-IMM: :[[@LINE+1]]:19: error: immediate must be an integer in the range [-16, 15]
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qc.mvnei x9, x10, 17, x12
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvnei x9, x10, 5, x12
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# CHECK-PLUS: :[[@LINE+2]]:11: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:11: error: invalid operand for instruction
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qc.mvltui 9, x10, 5, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvltui x9
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# CHECK-IMM: :[[@LINE+1]]:20: error: immediate must be an integer in the range [0, 31]
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qc.mvltui x9, x10, 37, x12
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvltui x9, x10, 5, x12
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# CHECK-PLUS: :[[@LINE+2]]:11: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:11: error: invalid operand for instruction
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qc.mvgeui 9, x10, 5, x12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.mvgeui x9
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# CHECK-IMM: :[[@LINE+1]]:20: error: immediate must be an integer in the range [0, 31]
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qc.mvgeui x9, x10, 37, x12
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqcicm' (Qualcomm uC Conditional Move Extension)
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qc.mvgeui x9, x10, 5, x12
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