derek.holloway
7502bf64a4
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125 lines
4.1 KiB
ArmAsm
125 lines
4.1 KiB
ArmAsm
# Xqciint - Qualcomm uC Interrupts extension
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# RUN: not llvm-mc -triple riscv32 -mattr=+xqciint < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-PLUS %s
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# RUN: not llvm-mc -triple riscv32 -mattr=-xqciint < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-MINUS %s
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# CHECK-PLUS: :[[@LINE+2]]:12: error: immediate must be an integer in the range [0, 1023]
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# CHECK-MINUS: :[[@LINE+1]]:12: error: invalid operand for instruction
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qc.setinti 1025
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# CHECK: :[[@LINE+1]]:16: error: invalid operand for instruction
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qc.setinti 11, 12
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.setinti
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.setinti 10
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# CHECK-PLUS: :[[@LINE+1]]:12: error: immediate must be an integer in the range [0, 1023]
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qc.clrinti 2000
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# CHECK: :[[@LINE+1]]:16: error: invalid operand for instruction
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qc.clrinti 22, x4
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.clrinti
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.clrinti 8
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# CHECK-PLUS: :[[@LINE+2]]:13: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:13: error: invalid operand for instruction
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qc.c.clrint 22
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.c.clrint
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.clrint x8
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# CHECK: :[[@LINE+1]]:9: error: invalid operand for instruction
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qc.c.di 22
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.di
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# CHECK-PLUS: :[[@LINE+2]]:10: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:10: error: invalid operand for instruction
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qc.c.dir 22
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.c.dir
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.dir x8
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# CHECK: :[[@LINE+1]]:9: error: invalid operand for instruction
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qc.c.ei 22
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.ei
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# CHECK-PLUS: :[[@LINE+2]]:10: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:10: error: invalid operand for instruction
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qc.c.eir 22
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.c.eir
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.eir x8
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# CHECK: :[[@LINE+1]]:19: error: invalid operand for instruction
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qc.c.mienter.nest 22
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.mienter.nest
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# CHECK: :[[@LINE+1]]:14: error: invalid operand for instruction
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qc.c.mienter 22
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.mienter
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# CHECK: :[[@LINE+1]]:17: error: invalid operand for instruction
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qc.c.mileaveret 22
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.mileaveret
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# CHECK-PLUS: :[[@LINE+2]]:13: error: register must be a GPR excluding zero (x0)
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# CHECK-MINUS: :[[@LINE+1]]:13: error: invalid operand for instruction
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qc.c.setint 22
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# CHECK: :[[@LINE+1]]:1: error: too few operands for instruction
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qc.c.setint
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# CHECK-MINUS: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.setint x8
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# CHECK: :[[@LINE+1]]:11: error: invalid operand for instruction
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qc.c.mret x8
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.mret
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# CHECK: :[[@LINE+1]]:12: error: invalid operand for instruction
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qc.c.mnret 10
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# CHECK-EXT: :[[@LINE+1]]:1: error: instruction requires the following: 'Xqciint' (Qualcomm uC Interrupts Extension)
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qc.c.mnret
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