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56 lines
3.2 KiB
ArmAsm
56 lines
3.2 KiB
ArmAsm
! RUN: not llvm-mc %s -triple=sparcv9 -show-encoding 2>&1 | FileCheck %s --check-prefixes=NO-VIS2
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! RUN: llvm-mc %s -triple=sparcv9 -mattr=+vis2 -show-encoding | FileCheck %s --check-prefixes=VIS2 --implicit-check-not=error:
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!! VIS 2 instructions.
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: bmask %o0, %o1, %o2 ! encoding: [0x95,0xb2,0x03,0x29]
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bmask %o0, %o1, %o2
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: bshuffle %f0, %f2, %f4 ! encoding: [0x89,0xb0,0x09,0x82]
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bshuffle %f0, %f2, %f4
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: siam 0 ! encoding: [0x81,0xb0,0x10,0x20]
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siam 0
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: siam 1 ! encoding: [0x81,0xb0,0x10,0x21]
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siam 1
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: siam 2 ! encoding: [0x81,0xb0,0x10,0x22]
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siam 2
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: siam 3 ! encoding: [0x81,0xb0,0x10,0x23]
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siam 3
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: siam 4 ! encoding: [0x81,0xb0,0x10,0x24]
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siam 4
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: siam 5 ! encoding: [0x81,0xb0,0x10,0x25]
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siam 5
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: siam 6 ! encoding: [0x81,0xb0,0x10,0x26]
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siam 6
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: siam 7 ! encoding: [0x81,0xb0,0x10,0x27]
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siam 7
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: edge8n %o0, %o1, %o2 ! encoding: [0x95,0xb2,0x00,0x29]
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edge8n %o0, %o1, %o2
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: edge8ln %o0, %o1, %o2 ! encoding: [0x95,0xb2,0x00,0x69]
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edge8ln %o0, %o1, %o2
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: edge16n %o0, %o1, %o2 ! encoding: [0x95,0xb2,0x00,0xa9]
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edge16n %o0, %o1, %o2
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: edge16ln %o0, %o1, %o2 ! encoding: [0x95,0xb2,0x00,0xe9]
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edge16ln %o0, %o1, %o2
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: edge32n %o0, %o1, %o2 ! encoding: [0x95,0xb2,0x01,0x29]
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edge32n %o0, %o1, %o2
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! NO-VIS2: [[#@LINE+2]]:1: error: instruction requires a CPU feature not currently enabled
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! VIS2: edge32ln %o0, %o1, %o2 ! encoding: [0x95,0xb2,0x01,0x69]
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edge32ln %o0, %o1, %o2
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